一种用于硅基光电子芯片端面封装的深硅刻蚀工艺  

A Deep Silicon Etching Process for Edge Packaging of Silicon Photonic Chips

作　　者：赵恒 何来胜 杨伟 葛邦同 何金城 Zhao Heng;He Laisheng;Yang Wei;Ge Bangtong;He Jincheng(Chongqing United Microelectronics Center Co.,Ltd.,Chongqing 401332,China)

机构地区：[1]联合微电子中心有限责任公司,重庆401332

出　　处：《半导体技术》2022年第1期33-36,共4页Semiconductor Technology

基　　金：联合微电子中心有限责任公司自主投资项目(CUM-2019-ZS-RD-008-GG)。

摘　　要：硅基光电子芯片的端面耦合器具有大带宽、低损耗、偏振不敏感等优点,使人们希望在端面封装方面获得突破。提出了一种用于硅基光电子芯片端面封装的深硅刻蚀工艺,利用等离子体刻蚀形成的斜面与光纤阵列的封装面进行匹配封装,降低封装中的耦合反射;利用斜面刻蚀工艺和深硅刻蚀工艺相结合的方法制备深硅刻蚀槽,提高了晶圆划片的冗余度,通过控制深硅刻蚀槽内的划片位置来消除台阶凸起对光纤封装造成的不利影响,使在后续封装过程中无需对芯片端面台阶凸起实施磨抛工艺。实验结果显示,基于该工艺,端面耦合器损耗劣化小于0.1 dB。该封装结构可以在晶圆流片阶段实现制备,具有可大规模生产、降低硅基光电子芯片端面封装成本的优点,以及广阔的工程应用前景。The edge coupler of the silicon photonic chip has the advantages of large bandwidth,low loss and polarization insensitivity,which makes people hope to make a breakthrough in edge packaging.A deep silicon etching process for edge packaging of silicon photonic chips was proposed.The inclined surface formed by plasma etching was matched to the packaging surface of the fiber array to reduce the coupling reflection in the packaging.The deep silicon etching groove was prepared by the methods of combining the inclined surface etching and the deep silicon etching process,which improved the redundancy of wafer scribing.By controlling the scribing position in the deep silicon etching groove to eliminate the adverse effects of uneven steps on the fiber packaging,so that there is no need to perform the grinding and polishing process on the steps on the chip end surface in the subsequent packaging process.Experimental results show that based on this process,the edge coupler loss degradation is less than 0.1 dB.The packaging structure can be prepared in the wafer tape-out stage.It has the advantages of large-scale production and cost reduction for silicon photonic chip end-face packaging,and has a broad engineering application prospect.

关 键 词：硅基光电子芯片 端面耦合器 封装 磨抛 深硅刻蚀 

分 类 号：TN405[电子电信—微电子学与固体电子学]