10~26GHz CMOS六位数控衰减器设计与实现  

Design and Realization of a 10~26GHz CMOS 6-Bits Digital Attenuator

作　　者：雒寒阳 李斌[1] 陈卫东[1] LUO Hanyang;LI Bin;CHEN Weidong(China Electronics Technology Group Corporation No.54 Research Institute,Shijiazhuang 050081,China;Hebei Key Laboratory of Electromagnetic Spectrum Cognition and Control,Shijiazhuang 050011,China)

机构地区：[1]中国电子科技集团公司第五十四研究所,石家庄050081 [2]河北省电磁频谱认知与管控重点实验室,石家庄050011

出　　处：《计算机测量与控制》2023年第1期276-281,300,共7页Computer Measurement &Control

摘　　要：为了使衰减器更好的适应相控阵系统对高集成度波束赋形电路的应用需求;基于55 nm CMOS工艺,设计了一款具有低插入损耗、低附加相移特性的六位数控衰减器,该数控衰减器采用桥T和π型衰减结构级联而成,在10~26 GHz频率范围内实现步进为0.5 dB、动态范围为0~31.5 dB的信号幅度衰减;为减小插入损耗,NMOS开关采用悬浮栅和悬浮衬底连接方式,同时采用了电容补偿网络和电感补偿以有效降低附加相移;仿真结果表明,在10~26 GHz的频带范围内,该数控衰减器的插入损耗小于-7 dB,输入/输出回波小于-10 dB,附加相移小于±3°,所有衰减态的衰减误差均方根小于0.8 dB,芯片的核心电路面积为0.36 mm×0.16 mm。In order to make attenuators better meet the application requirements of high integration beamforming circuit in phased array system, based on 55 nm CMOS technology, a 6-bits digital attenuator with small phase variation and low insertion loss is designed. The digital attenuator is cascaded by using the bridge T and π structures, and a dynamic attenuation range from 0 to 31.5 dB with a step resolution of 0.5 dB is realized in the frequency range of 10~26 GHz. In order to reduce insertion loss, floating gate and floating body are adopted in NMOS switch. In addition, inductance compensation and capacitance compensation network are used to achieve low phase variation. The simulation results show that in the frequency range of 10~26 GHz, the insertion loss of the digital attenuator is less than-7 dB, the input and output reflection wave less than-10 dB, the additional phase shift less than ±3°phase for all attenuation state, the RMS error of attenuations less than 0.8 dB, the total chip size excluding pads is 0.36 mm×0.16 mm.

关 键 词：集成电路技术 数控衰减器 CMOS NOMS开关 附加相移 

分 类 号：TN432[电子电信—微电子学与固体电子学]