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作 者:连铎 刘博生 吴亚兰[1] 武继刚[1] LIAN Duo;LIU Bo-sheng;WU Ya-lan;WU Ji-gang(School of Computer Science and Technology,Guangdong University of Technology,Guangzhou 510006,China)
出 处:《小型微型计算机系统》2023年第7期1405-1411,共7页Journal of Chinese Computer Systems
基 金:国家自然科学基金项目(62072118)资助。
摘 要:k近邻算法(k-Nearest Neighbor,k-NN)和k-均值(k-means)算法在数据挖掘,文本分类,人脸识别等领域中被广泛应用.相比于深度学习(如卷积神经网络,Convolutional Neural Networks,CNNs),k-NN和k-means能获得相近的精度情况下提供更简单的计算.尽管如此,硬件加速器在计算k-NN和k-means过程中,需大量访问片外动态随机存取存储器(Dynamic Random-Access Memory,DRAM)设备,能耗非常高.为解决这一问题,本项工作提出一个基于近内存计算(near-memory computing)的k-NN和k-means的可配置加速器KNMC.该加速器通过配置能灵活调度k-NN和k-means.为提高加速器的能效,本项工作还进行设计空间探索,探索加速器达到最优能效的片上缓存(on-chip buffer)容量和处理单元(Process Element,PE)规模的配置.实验结果表明,KNMC与最先进的基准加速器相比,能有效提升性能和能效.K-Nearest Neighbor(k-NN)and k-means algorithms are widely deployed in data mining,text classification,and face recognition.Compared with deep learning(such as convolutional neural networks,CNNs),k-NN and k-means can provide simpler computation with comparable accuracy performance.However,k-NN and k-means accelerators consume massive amount of hardware resources,because they require massive amount of data movement between on-chip memory and off-chip dynamic random access memory(DRAM)devices,resulting in significant energy consumption.In this work,we propose a near-memory accelerator for k-NN and k-means.This work provides a configurable near memory computing architecture that can flexibly suit k-NN and k-means accelerations.To further improve energy efficiency,this work conducts a design space search,which the configuration of on-chip buffer capacity and process element(PE)size are fully exploited for the best energy efficiency.Experimental results show the significant energy efficiency improvements compared with the state-of-the-art accelerator baseline.
关 键 词:加速器 K近邻算法 K-均值算法 近内存计算 设计空间探索
分 类 号:TN492[电子电信—微电子学与固体电子学]
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