可变容量的高可靠Flash型FPGA配置存储器设计  

Design of High Reliable Flash FPGA Configuration Memory with Variable Capacity

作　　者：曹正州 查锡文 CAO Zhengzhou;ZHA Xiwen(East Technologies,Inc.,Wuxi 214072,China;Wuxi Hope Microelectronics Co.,Ltd.,Wuxi 214072,China)

机构地区：[1]无锡中微亿芯有限公司,江苏无锡214072 [2]无锡华普微电子有限公司,江苏无锡214072

出　　处：《电子与封装》2023年第10期58-65,共8页Electronics & Packaging

摘　　要：采用0.18μm 2P6M Flash工艺设计了一款FPGA配置存储器,为SRAM型FPGA提供了串行和并行的码流加载方式,最高工作频率为50 MHz,具有存储容量可变、可靠性高的优点。通过设计地址侦测电路实现了该FPGA配置芯片的存储容量可变,从而提高了该配置芯片的适用范围;通过设计双模的复位电路,使芯片更适应复杂的电源环境,提高了上电复位的可靠性;通过设计存储器内建自测试(MBIST)电路,实现了对Flash全地址存储空间的自测试和对电路的高效筛选,减少了芯片的测试时间,同时提高了配置芯片存储空间的可靠性。An FPGA configuration memory is designed with 0.18μm 2P6M Flash process.It provides serial and parallel stream loading modes for SRAM FPGAs.The maximum working frequency is 50 MHz,and it has the advantages of variable storage capacity and high reliability.The memory capacity variability of the FPGA configuration chip is realized by designing an address detection circuit,and the application range of the FPGA configuration chip is improved.By designing a two-mode reset circuit,the chip is more suitable for complex power supply environment,and the reliability of power-on reset is improved.Memory build in self-test(MBIST)circuit is designed to realize the self-test of Flash full address storage space and efficient screening of the circuit,the test time of the chip is reduced,and the reliability of the configuration chip storage space is improved.

关 键 词：配置存储器 FPGA 可变容量 FLASH 存储器内建自测试 

分 类 号：TN402[电子电信—微电子学与固体电子学]