基于45 nm SOI CMOS的56 Gbit/s PAM-4光接收机前端设计  

Design of a 56 Gb/s PAM-4 optical receiver front-end in 45 nm SOI CMOS

作　　者：张文嘉 林福江 ZHANG Wenjia;LIN Fujiang(School of Microelectronics,University of Science and Technology of China,Hefei 230027,China)

机构地区：[1]中国科学技术大学微电子学院,安徽合肥230027

出　　处：《微电子学与计算机》2024年第1期106-112,共7页Microelectronics & Computer

摘　　要：在光接收电路设计中,光电二极管的寄生电容以及大的输入电阻会导致接收机带宽下降,造成严重的符号间干扰(Inter-Symbol Interference,ISI)。噪声性能是高速跨阻放大器(Transimpedance Amplifier,TIA)最重要的指标之一,跨阻值决定系统的噪声性能,同时也限制了数据速率。针对100G/400G互补金属氧化物半导体(Complementary Metal Oxide Semiconductor,CMOS)光接收机应用,基于45 nm绝缘衬底上的硅(Silicon-On-Insulator,SOI)工艺设计了一种采用四电平脉冲幅度调制(4-level Pulse Amplitude Modulation,PAM-4)、工作速率为56 Gbit/s(28 Gbaud/s)的低噪声光接收机前端放大器。小带宽TIA和用于带宽拓展的跨导/跨导(g_(m)/g_(m))放大器组成两级接收前端,在改善噪声性能的同时有效提高了带宽。采用反相器结构来增大先进CMOS工艺下的跨导和改善线性度。可变增益放大器(Variable Gain Amplifier,VGA)采用折叠Gilbert结构设计,采用并联峰化电感来提高带宽。整体电路的增益动态范围为51.6~70.6 dB,-3 dB带宽达到20.1 GHz;等效输入噪声电流密度为17.3 pA=Hz^(12);电路采用GF 45 nm SOI CMOS工艺实现,在1.1 V和1.3 V电源电压下功耗为65 mW;版图核心面积为600μm*240μm。In optical receiver design,the parasitic capacitance of the photodiode and the large input resistance will reduce the bandwidth of the receiver,causing serious inter-symbol interference(ISI).Noise is one of the most important metrics of the high-speed transimpedance amplifier(TIA),and the transimpedance value determines the noise performance of the system while also limits the data rate.An optical receiver front-end based on 45 nm Silicon-On-Insulator(SOI)process for 4-level Pulse Amplitude Modulation(PAM-4)working at 56 Gbit/s(28 Gbaud/s)is presented tailored to 100G/400G optical receiver applications.A low-bandwidth TIA and a g_(m)/g_(m)amplifier for bandwidth expansion form a two-stage front-end that improves noise performance while effectively expanding bandwidth.The inverter structure is used to increase transconductance and improve linearity in advanced Complementary Metal Oxide Semiconductor(CMOS)technology.The variable gain amplifier(VGA)is designed with a folded Gilbert structure and uses a parallel peaking inductor to expand bandwidth.The dynamic range of the overall circuit is 51.6 dB to 70.6 dB,and the-3 dB bandwidth reaches 20.1 GHz.The input referred noise current density is 17.3.The circuit is implemented in GF 45 nm SOI CMOS,dissipating 65 mW of power from 1.1 V and 1.3 V supply.The layout core area is 600μm*240μm.

关 键 词：PAM-4 光接收机前端 跨阻放大器 可变增益放大器 45 nm SOI CMOS 

分 类 号：TN432[电子电信—微电子学与固体电子学]