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作 者:刘军[1,2] 项晨[1,2] 陈田 吴玺[1,2] LIU Jun;XIANG Chen;CHEN Tian;WU Xi(School of Computer and Information,Hefei University of Technology,Hefei 230009,China;Anhui Province Key Laboratory of Affective Computing and Advanced Intelligent Machine,Hefei University of Technology,Hefei 230009,China)
机构地区:[1]合肥工业大学计算机与信息学院,安徽合肥230009 [2]合肥工业大学情感计算与先进智能机器安徽省重点实验室,安徽合肥230009
出 处:《微电子学与计算机》2024年第4期132-140,共9页Microelectronics & Computer
基 金:国家自然科学基金(62174048)。
摘 要:对硅通孔(Through Silicon Via,TSV)进行绑定后测试可以有效地提升三维集成电路的性能和良率。现有的测试方法虽然对于开路和桥接故障的测试能力较高,但是对于泄漏故障的测试效果较差,并且所需的总测试时间较长。对此,提出了一种基于分压电路的TSV绑定后测试方法。该方法设计了一种分压电路,进行泄漏故障测试时可以形成一条无分支的电流路径,有效提高了对泄漏故障的测试能力。此外,该方法测试开路故障和泄漏故障时的电流路径不会相互干扰,可以同时测试相邻TSV的开路故障和泄漏故障。实验结果表明,该方法可以测试10 kΩ以下的弱泄漏故障,并且在工艺偏差下依然能够保持较高的测试能力。相比同类测试方法,该方法所需面积开销更小,所需总测试时间更少。Post-bond Through Silicon Via(TSV)test can effectively improve the performance and yield of 3D ICs.Although existing test methods have high test capabilities for open and bridge faults,their effectiveness for testing leakage faults is poor,and the total test time is long.To address this issue,a post-bond TSV test method based on the voltage divider circuit is proposed.This proposed method designs a voltage divider circuit that can form an uninterrupted current path during leakage fault testing,effectively improving the test capabilities for leakage faults.In addition,the current paths of testing open and leakage faults do not interfere with each other,so this method can test open and leakage faults of adjacent TSVs simultaneously.Experimental results demonstrate that this proposed method can test weak leakage faults below 10 kΩand maintain high test capabilities even under process variations.Compared to similar test methods,this method has a smaller area overhead and less total test time.
分 类 号:TN407[电子电信—微电子学与固体电子学]
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