基极触发的雪崩晶体管导通机理  

Conduction Mechanism of Base⁃Triggered Avalanche Transistors

作　　者：王欢[1] 乔汉青[3] 程骏 胡龙 李昕[2] 王翔宇 方旭[3] Wang Huan;Qiao Hanqing;Cheng Jun;Hu Long;Li Xin;Wang Xiangyu;Fang Xu(Key Laboratory for Physical Electronics and Devices of the Ministry of Education,School of Electronic Science and Engineering,Xi’an Jiaotong University,Xi’an 710049,China;School of Microelectronics,Xi’an Jiaotong University,Xi’an 710049,China;Key Laboratory of Advanced Science and Technology on High Power Microwave,Northwest Institute of Nuclear Technology,Xi’an 710024,China)

机构地区：[1]西安交通大学电子科学与工程学院电子物理与器件教育部重点实验室,西安710049 [2]西安交通大学微电子学院,西安710049 [3]西北核技术研究所先进高功率微波技术重点实验室,西安710024

出　　处：《半导体技术》2024年第5期432-441,共10页Semiconductor Technology

摘　　要：为研究基极触发的雪崩晶体管导通机理,建立了雪崩晶体管(n+⁃p⁃n⁃n+掺杂结构)的准三维器件模型和实验测试电路。研究了雪崩晶体管的温度分布特征,导通结束后器件最高温度约为417 K,位于电流通道内n⁃n+边界处。当集电极电压为300 V、基极触发电压为2.4 V时,仿真和实验获得的脉冲上升时间分别为2.4 ns、2.5 ns,半高宽(FWHM)分别为6.2 ns、5.8 ns,仿真和实验结果基本一致。研究结果表明:高触发脉冲电压幅值会加速晶体管内部电场的重建过程,从而缩短延迟时间,提高晶体管响应速度;负载阻抗会影响器件导通通道尺寸,负载阻抗减小时,电流密度提升,器件通过缩窄通道来提高通道内电流密度,宏观导通电阻降低。A quasi three⁃dimensional device model and experimental test circuit of avalanche tran⁃sistors(n+⁃p⁃n⁃n+doped structure)were established to study the conduction mechanism of base⁃triggered avalanche transistors.The temperature distribution characteristics of avalanche transistors were studied,and the highest temperature of the device after conduction was about 417 K,located at the n⁃n+boundary within the current channel.When the collector voltage is 300 V and the base⁃triggering voltage is 2.4 V,the simulated and experimental pulse rise time is 2.4 ns and 2.5 ns,respectively,and the full width at half maximum(FWHM)is 6.2 ns and 5.8 ns,respectively.The simulated and experimental results are basically consistent.The research results indicate that a high amplitude of triggering pulse voltage may accelerate the reconstruction process of the internal electric field in the transistor,thereby shortening the delay time and improving the transistor response speed.The load impedance affects the size of the device conduction channel.When the load impedance decreases,the current density increases.The device narrows the channel to increase the current density inside the channel,resulting in a decrease in macro⁃scopic conduction resistance.

关 键 词：雪崩晶体管 超宽带(UWB)脉冲 雪崩击穿 碰撞电离 物理参数模型 

分 类 号：TN387[电子电信—物理电子学]