国产FPGA高速串行接口误码率测试软件设计  

Software Design of High-Speed Serial Interface Error Ratio Test Based on Domestic FPGA

作　　者：李卿 段辉鹏 惠锋 LI Qing;DUAN Huipeng;HUI Feng(Wuxi Esiontech Co.,Ltd.,Wuxi 214072,China)

机构地区：[1]无锡中微亿芯有限公司,江苏无锡214072

出　　处：《电子与封装》2024年第5期59-64,共6页Electronics & Packaging

摘　　要：随着内嵌高速串行接口FPGA的广泛应用,其信号质量的监测变得极为重要。设计了1种基于国产FPGA芯片的高速串行接口误码率测试软件,采用软核实现高速串行接口误码率统计、属性动态重配置,利用上位机软件进行实时监测,有效地提高了测试效率。通过实际用例详述了软件进行误码率测试的方法与步骤,进而验证了该软件测试的有效性。研究结果表明,该软件具有较好的用户体验度、较高的测试效率,对FPGA国产化进程起到了积极的推动作用。With the widespread use of the FPGA with embedded high-speed serial interface,the monitoring of signal quality becomes extremely important.A high-speed serial interface error ratio test software based on domestic FPGA chip is designed,which uses a soft core to achieve high-speed serial interface error ratio statistics and dynamical reconfiguration of attributes,and real-time monitoring is carried out by using host computer software,thus effectively improving the test efficiency.The method and steps for the software to perform error ratio test are detailed through practical example,and the validity of the software test is verified.The research results indicate that the software can provide a good user experience and high test efficiency,and plays a positive role in promoting the localization process of FPGA.

关 键 词：FPGA 高速串行接口 误码率 

分 类 号：TN402[电子电信—微电子学与固体电子学]