集成电路固有失效机理的可靠性评价综述  

Review on the reliability evaluation of inherent failure mechanism of integrated circuits

作　　者：章晓文[1] 周斌[1] 牛皓 林晓玲[1] ZHANG Xiaowen;ZHOU Bin;NIU Hao;LIN Xiaoling(Science and Technology on Reliability Physics and Application of Electronic Component Laboratory,Ministry of Industry and Information Technology Electronics Fifth Research Institute,Guangzhou 650500,China)

机构地区：[1]工业和信息化部电子第五研究所电子元器件可靠性物理及其应用技术重点实验室,广州650500

出　　处：《集成电路与嵌入式系统》2024年第7期1-11,共11页Integrated Circuits and Embedded Systems

摘　　要：ULSI/VLSI集成电路芯片的可靠性既与设计有关,也与工艺加工过程有关,即芯片的可靠性是设计进去、制造出来。设计是集成电路芯片可靠性的基础,工艺制造是集成电路芯片可靠性的实现。要使超大规模集成电路在特定的寿命期间内能够稳定地工作,必须对影响集成电路芯片可靠性的固有失效机理进行评价。评价的目的是确定磨损失效的机理,通过改进设计和工艺加工水平确保集成电路芯片在整个产品寿命期间有良好的可靠性。本文梳理了国内外集成电路芯片固有失效机理的可靠性评价标准,阐述了这些固有失效机理的产生机制,总结了不同固有失效机理的试验方法,提出了固有失效机理的可靠性评价要求。这些标准、方法和可靠性评价要求具有很强的时效性,集成电路芯片固有失效机理的可靠性评价将在工艺开发、建库及工程服务中发挥作用,并有助于推动国内合格生产线认证的开展。The reliability of ULSI/VLSI integrated circuit chips is related to both design and process.In order to make the chip of ULSI/VLSI operate stably during a specific lifetime,it is necessary to evaluate the inherent failure mechanism that affects the reliability of chips.The purpose of the evaluation is to determine the mechanism of technical wear and ensure that the chip has good reliability throughout the product life by improving the design and process processing level.This paper reviews the reliability evaluation standards of inherent failure mechanisms at home and abroad,expounds these inherent mechanisms,summarizes the experiment methods of different inherent failure mechanisms,and puts forward the reliability evaluation requirements of inherent failure mechanisms.The reliability evaluation of failure mechanisms play a role in process development,library construction and engineering services,and will promote the development of domestic qualitied manufacturer certification.

关 键 词：ULSI/VLSI集成电路芯片 固有失效机理 可靠性评价标准 可靠性试验方法 

分 类 号：TN386.1[电子电信—物理电子学]