SiC MOSFET栅极可靠性研究  

Study of Gate Reliability of SiC MOSFET

作　　者：丁杰钦 王震 程银华 何逸涛 DING Jie-qin;WANG Zhen;CHENG Yin-hua;HE Yi-tao(Zhuzhou CRRC Times Semiconductor Co.,Ltd.,Zhuzhou 412000,China)

机构地区：[1]株洲中车时代半导体有限公司,湖南株洲412000

出　　处：《电力电子技术》2024年第12期119-124,共6页Power Electronics

基　　金：新型显示与战略性电子材料重点专项(2022YFB-3604003);功率半导体与集成技术全国重点实验室(2023-PT1009)。

摘　　要：栅极可靠性一直是SiC MOSFET芯片所面临的重要问题,主要体现在高温栅偏所导致的阈值电压退化。如何提升SiC MOSFET芯片的阈值电压稳定性,需要展开系统而深入研究。从栅氧氮化和后道工艺出发,研究了氮化退火过程对栅氧界面态密度(Dit)、沟道电子迁移率(μ)与栅极负栅压可靠性的影响机理。通过μ与负偏压温度应力(NBTS)导致的转移特性漂移量(△U_(th))的折中关系,得出了最优栅氧氮化工艺条件。同时,探究了多种类型的层间介质(ILD)对栅源漏电,进而影响栅极可靠性的作用机制。结果表明USG介质由于具有较小的有效电荷含量,降低了对栅氧界面的影响,基于其制备的SiC MOSFET芯片具有较好的栅极可靠性。Gate reliability has been an important problem for silicon carbide(SiC)MOSFET chips,mainly reflected in the threshold voltage degradation caused by high temperature gate bias.How to improve the threshold voltage stability of SiC MOSFET chip needs to be studied systematically and deeply.It focus on the gate oxide nitridation and postprocess,the influence of nitridation anneal on gate oxide interface trap density(Dit),channel electron mobility(μ)and the reliability of negative gate stress is studied.The optimum conditions of gate oxide nitridation process are obtained through the trade-off betweenμand the transfer characteristic drift(△U_(th))caused by negative bias temperature stress(NBTS).At the same time,the effect of various types of interlayer dielectric(ILD)on gate leakage and gate reliability is explored.The results show that USG dielectric lowered the effect on gate oxide interface due to its smaller effective charge content,and the SiC MOSFET chip based on USG shows better gate reliability.

关 键 词：碳化硅 栅极 界面态密度 

分 类 号：TN32[电子电信—物理电子学]