一种适用于GaN栅驱动的具有自适应能力的电平移位电路  

A Self-adaptive Level Shifting Circuit for GaN Gate Driver

作　　者：王亮 刘大伟 范建林 庄巍 Wang Liang;Liu Dawei;Fan Jianlin;Zhuang Wei(School of Electronic and Information Engineering,Wuyi University,Jiangmen,Guangdong 529020,China;Institute of Semiconductors,Guangdong Academy of Sciences,Guangzhou 510651,China)

机构地区：[1]五邑大学电子与信息工程学院,广东江门529020 [2]广东省科学院半导体研究所,广州510651

出　　处：《机电工程技术》2025年第2期153-158,共6页Mechanical & Electrical Engineering Technology

基　　金：集成电路设计技术研发和集成电路设计公共服务平台建设(广东省科学院)纵向项目(1220180001)。

摘　　要：半桥驱动器中高侧驱动信号电平移位电路是驱动芯片的核心模块,其功能是将低压域PWM控制信号转换成高边浮动电压域的驱动信号,从而控制上桥臂功率管的开启或关断。电平移位电路正常工作与否直接决定了驱动芯片的设计成败。介绍了一种用于GaN功率器件双输出栅极驱动的电平移位电路,旨在提高其共模瞬变干扰免疫(CMTI)能力,具有自适应性、高速、低功耗的特点。所提出的电平移位电路的浮动电压域利用自举电路供电,设计了自适应路径,自适应路径引入了输出端反馈,对差模输入信号不产生影响,且能根据不同大小的共模干扰噪声dV/dt感应出不同大小的补偿电流,来抑制高边驱动信号的电压尖峰,从而使电平移位电路能在浮动电源轨电压VSW快速浮动时保持稳定输出。该电路基于0.18μm BCD工艺仿真验证,结果显示上升沿传输延迟为1.55 ns,下降沿传输延迟为1.1 ns,d V/dt摆率抗扰度可达100 V/ns。The high-side drive signal level shifting circuit in a half-bridge driver serves as a critical component,converting low-voltage PWM control signals into high-side floating voltage domain drive signals to control the switching of the upper bridge power transistors.The proper operation of the level shifting circuit directly impacts the success of the driver chip design.A level shifting circuit designed for dual-output gate driver of GaN power devices is presented,aiming to enhance its common-mode transient immunity(CMTI)while maintaining adaptability,high speed,and low power consumption.The floating voltage domain of the proposed level shifting circuit is powered by bootstrap circuitry.An adaptive path is designed within the circuit,incorporating output feedback.This adaptive path,unaffected by the differential input signals,induces compensatory currents of varying magnitudes based on the differential-mode noise dV/dt,effectively suppressing voltage spikes in the high-side drive signals.Consequently,the level shifting circuit maintains stable outputs during rapid fluctuations in the floating power supply rail voltage VSW.The circuit is simulated and validated using a 0.18μm BCD process.Results demonstrate a rising edge propagation delay of 1.55 ns,falling edge propagation delay of 1.1 ns,and a dV/dt slew rate immunity of up to 100 V/ns.

关 键 词：GAN 栅驱动 电平移位电路 自适应 共模瞬变干扰免疫 传输延迟 

分 类 号：TN386[电子电信—物理电子学]