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作 者:彭宏伟 赵小寒 陈祎纯 陈睿凌 王青松 徐大为[1] PENG Hongwei;ZHAO Xiaohan;CHEN Yichun;CHEN Ruiling;WANG Qingsong;XU Dawei(The 58th Research Institute,CETC,Wuxi 214035,China)
机构地区:[1]中国电子科技集团第五十八研究所,无锡214035
出 处:《集成电路与嵌入式系统》2025年第3期54-58,共5页Integrated Circuits and Embedded Systems
摘 要:T型栅PMOS器件因其强抗辐照能力、低寄生电容,逐渐成为RFSOI电路中必不可少的器件。而跨导是MOS器件中的一个关键参数,但T型栅PMOS器件的跨导会在栅极电压增大时出现双峰效应,影响电路研制的判断。本文首先结合实测数据和3D TCAD仿真结果深入剖析了T型栅PMOS器件跨导双峰效应的内部机理,并从温度、主栅尺寸和次栅尺寸三个方面分析阐述了其对双峰效应的影响。最终,基于T型栅PMOS器件版图结构,提出了一种可抑制双峰效应的改进方案,通过了仿真和流片验证,可以很好地用于SOI工艺T型栅PMOS结构电路设计中。T-gate PMOS devices are increasingly essential in RFSOI circuits due to their remarkable radiation resistance and low parasitic capacitance.Conductance is a key parameter for MOS devices.However,the conductance of T-gate PMOS devices exhibits a doublepeak effect as the gate voltage increases,affecting the judgment of circuit development.In this paper,the internal mechanism of the double-peak effect of the conductance of T-gate PMOS devices is thoroughly analyzed by combining experimental data and 3D TCAD simulation results.The influence of the double-peak effect on the conductance is discussed from the perspectives of temperature,main gate size,and sub-gate size.Finally,based on the layout structure of the T-gate PMOS device,an improved result is proposed to suppress the double-peak effect.The proposed solution has been verified by simulation and wafer test and can be highly applicable to the circuit design of T-gate PMOS structures in the SOI process.
分 类 号:TN386[电子电信—物理电子学]
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