芯片原子层抛光研究进展与挑战  

Research progress and challenges in chip atomic layer polishing

作　　者：江亮[1] 吴渊 张永顺 郑佳昕 陈宇山 仲夏 周辽 魏宇廷 陈磊[1] 钱林茂[1] JIANG Liang;WU Yuan;ZHANG Yongshun;ZHENG Jiaxin;CHEN Yushan;ZHONG Xia;ZHOU Liao;WEI Yuting;CHEN Lei;QIAN Linmao(Tribology Research Institute,State Key Laboratory of Rail Transit Vehicle System,Southwest Jiaotong University,Chengdu 610031,China)

机构地区：[1]西南交通大学轨道交通运载系统全国重点实验室,摩擦学研究所,成都610031

出　　处：《清华大学学报(自然科学版)》2025年第2期215-232,共18页Journal of Tsinghua University(Science and Technology)

基　　金：国家自然科学基金重大项目课题(51991373);国家自然科学基金重点项目(52235004);国家重点研发计划课题(2020YFA0711001);中央高校基本科研业务费(2682024CG007)。

摘　　要：芯片是现代信息社会的基石,对于国家核心竞争力和国家安全具有重要意义。随着摩尔定律不断推进,芯片特征尺寸不断缩小并趋近物理极限,亟需发展原子层抛光,对器件表面实现以原子层为基本单元的极限精度抛光去除,以实现原子级精度表面,满足光刻、键合等工艺苛刻需求。目前,化学机械抛光是芯片制造中唯一能够同时实现晶圆局部和全局平坦化的关键技术,具备实现原子层抛光的潜力。为此,该文系统总结了芯片衬底表面和互连异质表面化学机械抛光的机理和工艺。对于衬底表面,目前已经实现单晶硅的微观单原子层可控去除和宏观近理论极限表面粗糙度抛光,基本探明化学机械抛光在晶圆表面的极限精度加工能力。对于互连异质表面,首先从摩擦学的角度,依据磨粒与表面之间的不同相互作用,分类总结化学机械抛光中的材料去除模式:机械犁沟和化学成键。然后在此基础上,提出互连异质表面同步去除调控原理和方法,归纳铜/钽、铜/钴、铜/钌等互连异质表面平坦化工艺。最后提出利用机械、化学、电/光/等离子体/能束等多场协同作用,将化学反应/机械化学反应限域在最表层原子,以期实现原子层抛光,助力高端芯片原子级制造。[Significance]This review highlights the progress and challenges in chip atomic layer polishing.Chips are fundamental to the modern information society.According to Moore's Law,the chip feature size is shrinking and approaching the physical limit.At the same time,advanced packaging technologies such as hybrid bonding continuously evolve.These create pressing needs to develop atomic layer polishing,a technique that enables extremely precise material removal at the atomic layer level,to achieve surfaces with atomic-level precision for demanding processes such as photolithography and bonding.Currently,chemical mechanical polishing(CMP)is the only key technology in chip manufacturing capable of simultaneously achieving local and global planarization of the wafer surface, with the potential to realize atomic layer polishing.This review provides a systematic summary of the mechanisms and processes of CMP for chip substrate surfaces andinterconnect heterogeneous surfaces. [Progress] Significant progress has been made in the controlled removal with a singleatomic layer precision at the microscopic level and in the CMP with surface roughness close to the theoretical limit at themacroscopic level for the monocrystalline silicon substrate. These advances highlight the extreme precision processingcapability of CMP for the wafer surface. Furthermore, ongoing developments in multi-field assisted CMP and energy particlebeam polishing hold promise for enabling atomic layer polishing for new substrates like GaN, SiC and diamond. In the case ofinterconnect heterogeneous surfaces, two material removal modes in CMP are summarized from a tribological perspectivebased on the interactions between the abrasive and material surfaces: mechanical plowing and chemical bonding. Copper,cobalt, and nickel are mainly removed through the mechanical plowing mode, while tantalum, ruthenium, and titanium aremainly removed through chemical bonding. According to this foundation, control principles and methods for achievingequivalent removal of hetero

关 键 词：芯片 原子层抛光 化学机械抛光 异质表面 同步去除 平坦化 

分 类 号：TN405[电子电信—微电子学与固体电子学]