FinFET器件的可靠性研究及模型构建  

Reliability study and modelling development of FinFET devices

作　　者：王于波 刘芳 曹永万 郁文 张同 朱亚星 丁国静 梁英宗 WANG Yubo;LIU Fang;CAO Yongwan;YU Wen;ZHANG Tong;ZHU Yaxing;DING Guojing;LIANG Yingzong(R&D Center,Beijing Smartchip Microelectronics Technology Co.,Ltd.,Beijing 102299,China)

机构地区：[1]北京智芯微电子科技有限公司研发中心,北京102299

出　　处：《集成电路与嵌入式系统》2025年第5期66-74,共9页Integrated Circuits and Embedded Systems

基　　金：国家重点研发计划资助项目—工艺-器件-电路协同设计方法(2023YFB4402700)。

摘　　要：随着工艺节点的不断缩小和器件三维立体结构的复杂化,器件的可靠性问题日益凸显,成为学术界和工业界共同关注的重要议题。本文针对FinFET(鳍式场效应晶体管)器件的可靠性进行了深入研究,设计并实施了在不同鳍数量(N fin)、漏极应力电压(V dstress)、栅极应力电压(V gstress)以及温度条件下的老化实验。测试数据分析显示,随着N fin、V dstress、V gstress和温度的增加,FinFET器件的老化现象加剧。基于这些实验结果,建立了一个可靠性老化模型,并通过参数优化实现了对阈值电压(V th_lin)和饱和电流(I dsat)退化情况的有效拟合。该模型在不同条件下的仿真精度表现优异,其中阈值电压的平均仿真误差控制在5 mV以内,饱和电流的平均仿真误差保持在1%以内。As process nodes continue to shrink and device structures become increasingly complex with the three-dimensional designs of the device,the reliability of the device is becoming a critical concern in both academia and industry.In this paper,an in-depth study of the reliability of FinFET(Fin Field-Effect Transistor)devices has been carried out,and ageing experiments have been designed and conducted under the conditions of different numbers of fins(N fin),drain stress voltages(V dstress),gate stress voltages(V gstress)and temperatures.Analysis of the test data indicates that the ageing phenomenon of FinFET devices increases with increasing N fin,V dstress,V gstress and temperature.Based on these experimental results,a reliability aging model is developed with parameter optimisation employed to achieve an effective fit to the degradation of threshold voltage(V th_lin)and saturation current(I dsat).The proposed model shows excellent simulation accuracy under different conditions,maintaining an average simulation error of less than 5 mV for the threshold voltage and within 1%for saturation current.

关 键 词：可靠性 FINFET 阈值电压 饱和电流 老化模型 

分 类 号：TN432[电子电信—微电子学与固体电子学]