低噪声CMOS电荷敏放大器设计与研制(英文)  

Design and Fabrication of a Low-Noise CMOS Charge Sensitive Amplifier

作　　者：于奇[1] 杨谟华[1] 李竞春[1] 王向展[1] 肖海燕[1] 

机构地区：[1]电子科技大学微电子与固体电子学院,成都610054

出　　处：《电子科技大学学报》2003年第2期146-148,163,共4页Journal of University of Electronic Science and Technology of China

基　　金：国家自然科学基金资助项目;编号:60072004 ~~

摘　　要：提出了一种新的低噪声低功耗电荷敏感放大器设计方案。用EDA软件Cadence进行模拟,得到了满意的仿真结果:直流开环增益为82.9 dB,f-3dB为28 kHz,相位裕度为46.9 ,低频下输出噪声频谱密度为1.5 mV/Hz2。采用标准的3 mm P阱CMOS工艺进行了流片,测试结果与模拟情况相近。A new design of low-noise low-power consumption charge sensitive amplifier is presented. Simulated by EDA software Cadence, the results obtained are satisfied. The DC open-loop gain is 82.9 dB with a 28 kHz 3 dB bandwidth and its phase margin is 46.9. The maximum output noise spectral density is 1.5 mV/Hz2 at very low frequency. Using standard 3 mm P-Well CMOS technology, the proposed amplifier is fabricated, and the measurement results are closed to the simulation.

关 键 词：低噪声 电荷放大器 低功耗设计 低电压 CMOS 仿真 

分 类 号：TN722[电子电信—电路与系统]