基于PLD的任意地址范围译码器设计方法  

Design method of random address range decoder based on PLD

作　　者：周立[1] 

机构地区：[1]长安大学信息工程学院,陕西西安710064

出　　处：《西安石油学院学报（自然科学版）》2003年第3期76-78,共3页Journal of Xi'an Petroleum Institute（Natural Science Edition)

摘　　要：通过对微机应用系统中地址译码器设计方法的探讨 ,指出了传统 MSI器件的局限性 .提出一种用可编程逻辑器件 PLD设计任意地址范围译码器的简便方法 .该方法给出了利用地址区间边界值直接写出地址译码逻辑关系式的 3个设计规则以及为进一步简化设计过程的 2个补充设计规则 .此设计方法对于用 FM软件进行According to the study of the design of address decoder in microcomputer application system, a simple method of designing an arbitrary address range decoder with programmable logic device (PLD) is put forward. In the method, the three design rules for directly writing the logical expression of the address decipher with the boundary values in address range and two additional ones for further simplify the design process are presented. This method is very convenient and practical for developing PLD device by FM software.

关 键 词：可编程逻辑器件 地址译码器 逻辑设计 PLD 微机应用系统 

分 类 号：TP332.1[自动化与计算机技术—计算机系统结构]