深亚微米应变SiGe沟PMOSFET特性模拟  

Simulation of Deep Submicron Strained SiGe Channel PMOSFET Performance

作　　者：杨荣[1] 罗晋生[1] 

机构地区：[1]西安交通大学微电子研究所,西安710049

出　　处：《固体电子学研究与进展》2003年第2期159-163,共5页Research & Progress of SSE

摘　　要：为研究深亚微米尺度下应变 Si Ge沟改进 PMOSFET器件性能的有效性 ,运用二维数值模拟程序MEDICI模拟和分析了 0 .1 8μm有效沟长 Si Ge PMOS及 Si PMOS器件特性。Si Ge PMOS垂直方向采用 Si/Si Ge/Si结构 ,横向结构同常规 PMOS,N+ -poly栅结合 P型δ掺杂层获得了合理阈值电压及空穴局域化。研究表明 ,经适当设计的 Si Ge PMOS比对应 Si PMOS的 IDmax、gm、f T均提高 1 0 0 %以上 ,表明深亚微米尺度 SiIn order to investigate the validity that the SiGe layer incorporated into deep submicron PMOSFET improves device performances, a strained Si 1-xGe x buried channel PMOS FET of 0.18 μm is simulated employing the MEDICI simulator, and compared with a conventional Si PMOSFET. The SiGe PMOS, whose vertical structure is Si/SiGe/Si layers and horizontal structure is the same as conventional PMOSFET, can obtain proper threshold voltage and good hole confinement by using an N +-poly-Si gate and a underlying P-type δ-doping layer. Many former studies considered that the strained layer can only improve the performance of PMOSFETs very finitely, while this simulation result of the aformentioned device structure denotes that the values of the parameters I Dmax, g m and f T of the SiGe PMOS are enhanced at least 100% compared with the Si PMOS, which shows the great application potential of deep submicron SiGe PMOS.

关 键 词：SIGE 深亚微米 锗—硅 P型金属—氧化物—半导体场效应晶体管 特性模拟 PMOSFET 

分 类 号：TN432[电子电信—微电子学与固体电子学] TN304.2