基于FPGA的KLT特征点选取IP核的设计  

Design of FPGA-based Feature Points Selection IP Core for KLT

作　　者：马骏[1] 柴志雷[1] 钟传杰[1] 

机构地区：[1]江南大学教育部物联网应用技术工程研究中心,江苏无锡214122

出　　处：《微电子学与计算机》2014年第11期47-50,55,共5页Microelectronics & Computer

基　　金：国家自然科学基金(60703106)

摘　　要：针对传统KLT算法的特征点选取存在计算耗时、通用性差等缺点,提出一种以可并行归并排序为基础的通用KLT特征点选取方法,并在FPGA上实现通用IP核设计.实验结果表明该IP核以较少硬件资源实现了KLT特征点实时选取,并具备较好的通用性,能够满足实际应用的需求.To solve the disadvantage of traditional feature points selecting method such as calculation time-consuming and poor universal ,a universal parallelized method for selecting feature points is proposed and its IP core for FPGA is designed .The result of experiment demonstrates this IP core achieve a good real-time performance with fewer resources consumption ,and has good versatility ,w hich can meet the needs of applications .

关 键 词：FPGA KLT 图像处理 IP核 

分 类 号：TN791[电子电信—电路与系统]