一种新的铁电电容模型及其在1T/1C FeRAM中的应用  

A New Ferroelectric Capacitor Model and Its Application in 1T/1C FeRAM

作　　者：程旭[1] 汤庭鳌[1] 王晓光[1] 钟宇[1] 康晓旭[1] 

机构地区：[1]复旦大学微电子学系

出　　处：《固体电子学研究与进展》2004年第1期123-129,共7页Research & Progress of SSE

基　　金：国防科技预研项目;AM基金项目;博士点基金项目资助

摘　　要：随着集成铁电工艺的迅速发展和铁电电容的广泛应用 ,铁电电容模型的缺乏已成为制约基于铁电电容电路设计和优化的瓶颈。文中提出的非线性双电容铁电电容模型是线性双电容铁电电容模型的改进 ,它不仅与线性双电容模型一样易于用宏模型实现 ,而且比后者具有更高的精度和更简单的控制方式。以 1 T/1 C单元作为基于铁电电容电路设计优化的实例 ,定性分析了位线寄生电容对读出窗口的影响 ,并在 HSPICE中用非线性双电容模型进行了仿真 ,得到位线寄生电容与 1 T/1 C单元铁电电容比例 (CBL/CF E)对读出窗口的最优值 :CBL/CF E=2 .As the rapid progress of integrated ferroelectric technology and the wide use of ferroelectric capacitors (FeCap), the lack of FeCap model has been a bottleneck of circuit design and optimization based on FeCap. The non-linear dual capacitor model presented in this article is an improvement form of the linear dual capacitor model. It not only can be implemented with a macromodel as easily as the linear dual capacitor model, but also is more accurate and has simpler controllable way. Further more, we take 1T/1C as an example of circuit design and optimization based on FeCap and analyze the effect of bit-line parasitic capacitance on the sensing window. With simulation using the non-linear dual cappacitor model in HSPICE, we get the merit of the ratio of bit-line capacitance to the FeCap in 1T/1C cell with respect to sensing window: C BL / C FE =2.4.

关 键 词：铁电电容 宏模型 稳态模型 FERAM 读出容限 

分 类 号：TP333[自动化与计算机技术—计算机系统结构] TM53[自动化与计算机技术—计算机科学与技术]