supported by the National Natural Science Foundation of China(Grant No.62371109);in part by the Sichuan Science and Technology Program(Grant No.2022YFG0164);in part by the Medico-Engineering Cooperation Funds from University of Electronic Science and Technology of China(Grant No.ZYGX2021YGLH203);in part by the General Project of Chongqing Natural Science Foundation(Grant No.2022NSCQ-MSX5348);in part by the Guangdong Basic and Applied Basic Research Foundation(Grant No.2023A1515010041);supported by the Major Project of the National Natural Science Foundation of China(Grant No.62090012)。
This article designs a 14-bit successive approximation register analog-to-digital converter(SAR ADC).A novel digital bubble sorting calibration method is proposed and applied to eliminate the effect of capacitor misma...
A 14-bit successive approximation analog-to-digital converter (SAR ADC) with capacitive calibration has been designed based on the SMIC. 18 μm CMOS process. The overall architecture is in fully differential form to e...