相关期刊:《Chinese Journal of Electronics》《Chinese Journal of Mechanical Engineering》《Intelligent Control and Automation》《Analysis in Theory and Applications》更多>>
A semi-digital clock and data recovery (CDR) is presented. In order to lower CDR trace jitter and decrease loop latency, an average-based phase detection algorithm is adopted and realized with a novel circuit. Imple...
This paper presents the design considerations and implementation of an area-efficient interpolator suitable for a delta-sigma D/A converter. In an effort to reduce the area and design complexity, a method for designin...