MULTI-CORE

作品数:83被引量:73H指数:4
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Optimizing Multi-Dimensional Packet Classification for Multi-Core Systems被引量:1
《Journal of Computer Science & Technology》2018年第5期1056-1071,共16页Tong Shen Da-Fang Zhang Gao-Gang Xie Xin-Yi Zhang 
This work was supported by the National Basic Research 973 Program of China under Grant No. 2012CB315805 and the National Natural Science Foundation of China under Grant Nos. 61472130 and 61702174.
Packet classification has been studied for decades; it classifies packets into specific flows based on a given rule set. As software-defined network was proposed, a recent trend of packet classification is to scale th...
关键词:MULTI-DIMENSIONAL MULTI-CORE packet classification 
OpenMDSP:Extending OpenMP to Program Multi-Core DSPs被引量:1
《Journal of Computer Science & Technology》2014年第2期316-331,共16页何江舟 陈文光 陈光日 郑纬民 汤志忠 叶寒栋 
supported by the National High Technology Research and Development 863 Program of China under Grant No.2012AA010901;the National Natural Science Foundation of China under Grant No.61103021
Multi-core digital signal processors (DSPs) are widely used in wireless telecommunication, core network transcoding, industrial control, and audio/video processing technologies, among others. In comparison with gene...
关键词:OPENMP multi-core digital signal processor data parallelism Long Term Evolution 
Resources Snapshot Model for Concurrent Transactions in Multi-Core Processors
《Journal of Computer Science & Technology》2013年第1期106-118,共13页赵雷 杨季文 
supported by the National Natural Science Foundation of China under Grant No.61073061
Transaction parallelism in database systems is an attractive way of improving transaction performance. There exists two levels of transaction parallelism, inter-transaction level and intra-transaction level. With the ...
关键词:MULTI-CORE database transaction PARALLELISM CONCURRENCY conflict detection 
Pinned OS/Services: A Case Study of XML Parsing on Intel SCC
《Journal of Computer Science & Technology》2013年第1期3-13,共11页Jie Tang Pollawat Thanarungroj Chen Liu Shao-Sllan Liu Zhi-Min Gu Jean-Luc Gaudiot 
This work is supported by the National Science Foundation of USA under Grant Nos. CCF-1065147, ECCS-1125762, the Scholarship Council of China, as well as the Beijing Institute of Technology Yu-Miao Ph.D. Scholarship of China. Any opinions, findings, and conclusions as well as recommendations expressed in this material are those of the authors and do not necessarily reflect the views neither of the National Science Foundation of USA nor of the Scholarship Council of China.
Nowadays, we are heading towards integrating hundreds to thousands of cores on a single chip. However, traditional system software and middleware are not well suited to manage and provide services at such large scale....
关键词:XML parsing homogeneous multi-core Intel Single-Chip Cloud Computer 
Revisiting Multiple Pattern Matching Algorithms for Multi-Core Architecture被引量:2
《Journal of Computer Science & Technology》2011年第5期866-874,共9页谭光明 刘萍 卜东波 刘燕兵 
supported by the National Natural Science Foundation of China under Grant Nos.60803030,60925009,60921002;the National Basic Research 973 Program of China under Grant No.2011CB302502
Due to the huge size of patterns to be searched,multiple pattern searching remains a challenge to several newly-arising applications like network intrusion detection.In this paper,we present an attempt to design effic...
关键词:parallel algorithm MULTI-CORE multiple pattern matching 
New Methodologies for Parallel Architecture被引量:1
《Journal of Computer Science & Technology》2011年第4期578-587,共10页范东睿 李晓维 李国杰 
supported by the National Basic Research 973 Program of China under Grant Nos.2011CB302500,2005CB321600;the National Natural Science Foundation of China under Grant No.60921002
Moore's law continues to grant computer architects ever more transistors in the foreseeable future, and parallelism is the key to continued performance scaling in modern microprocessors. In this paper, the achievemen...
关键词:ARCHITECTURE MULTI-CORE MANY-CORE PARALLELISM 
VERTAF/Multi-Core:A SysML-Based Application Framework for Multi-Core Embedded Software Development被引量:1
《Journal of Computer Science & Technology》2011年第3期448-462,共15页林朝圣 吕俊贤 林尚威 陈盈如 熊博安 
Multi-core processors are becoming prevalent rapidly in personal computing and embedded systems. Nevertheless, the programming environment for multi-core processor-based systems is still quite immature and lacks effic...
关键词:MULTI-CORE model-driven parallel programming FRAMEWORK SYSML design pattern 
Partitioning the Conventional DBT System for Multiprocessors被引量:1
《Journal of Computer Science & Technology》2011年第3期474-490,共17页马汝辉 管海兵 朱二周 杨洪波 杨吟冬 梁阿磊 
supported by the National Natural Science Foundation of China under Grant Nos. 60970108,60970107;the Scienceand Technology Commission of Shanghai Municipality under Grant Nos. 09510701600,10DZ1500200,10511500102;IBM SUR Funding;IBM Research-China JP Funding
Noticeable performance improvement via ever-increasing transistors is gradually trapped into a predicament since software cannot logically and efficiently utilize hardware resource, such as multi-core resource. This i...
关键词:DBT OPTIMIZATION MICROPROCESSOR MULTI-CORE SPECint 2000 
YHFT-QDSP:High-Performance Heterogeneous Multi-Core DSP
《Journal of Computer Science & Technology》2010年第2期214-224,共11页陈书明 万江华 鲁建壮 刘仲 孙海燕 孙永节 刘衡竹 刘祥远 李振涛 徐毅 陈小文 
supported by the National Science and Technology Major Project of the Ministry of Science and Technology of China under Grant No.2009ZX01034-001-001-006;the National High Technology Research and Development 863 Program of China under Grant No.2007AA01Z108;the Program for Changjiang Scholars and Innovative Research Team in Universities of China under Grant No.IRT0614.
Multi-core architectures are widely used to in time-to-market and power consumption of the chips enhance the microprocessor performance within a limited increase Toward the application of high-density data signal pro...
关键词:digital signal processor (DSP) MULTI-CORE ARCHITECTURE parallel programming custom design 
Design and Application of Instruction Set Simulator on Multi-Core Verification被引量:3
《Journal of Computer Science & Technology》2010年第2期267-273,共7页胡向东 郭勇 朱英 郭昕 王鹏 
Instruction Set Simulator (ISS) is a highly abstracted and executable model of micro architecture. It is widely used in the fields of verification and debugging during the development of microprocessors. However, wi...
关键词:processor design chip multi-processors (CMP) instruction set simulator (ISS) SIMULATION parallel stimulus 
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