Network-on-Chip (NoC) is a promising replacement of bus architecture due to its better scalability. In state-of-the-art NoCs, each packet contains several fixed-length flits, which facilitates allocations of network...
partially supported by Equipment Pre-Research Foundation of China(Grant No.9140A08010414JW03025)
Realizing barrier synchronization in multi-/many-core processors with high efficiency becomes more and more challenging as the number of cores integrated in a single chip keeps growing. Quite a few barrier solutions h...
With the development of technology and applications in space delay-tolerant networks(SDTNs), increasing attention has been paid on the routing technologies between different DTN nodes. This paper proposes a novel hy...
supported by National Natural Science of China(Grant Nos.61003039,61373138);Scientific and Technological Support Project of Jiangsu Province(Grant No.BE2012183);Natural Science Foundation for Higher Education Institutions of Jiangsu Province(Grant No.12KJA520002);Postdoctoral Foundation(GrantNos.1101011B,2012M511753,2013T60536);Project of Priority Academic Program Development of Jiangsu Higher Education Institutions(Grant No.yx002001)
QoS-aware routing algorithm is important in wireless multimedia sensor networks. This paper formulates a generalized QoS-aware routing model on the basis of multiple routing metrics and priorities of packets. We first...
supported by National Basic Research Program of China(973 Program)(Grant No.2012CB-315903);National Natural Science Foundation of China(Grant Nos.61103200,61070157);Key Science and Technology Innovation Team Project of Zhejiang Province(Grant No.2011R50010)
Distance vector routing protocols have been widely adopted as an efcient routing mechanism in current Internet, and many wireless networks. However, as is well-known, the existing distance vector routing protocols are...
supported by National Natural Science Foundation of China(Grant No.60873263);National Basic Research Program of China(Grant No.2007CB310706);National High-Tech Research&Development Program of China(Grant No.2009AA01Z215);New Century Excellent Talents in University(Grant No.NCET-09-0268)
Typical delay tolerant networks (DTNs) often suffer from long and variable delays, frequent connectivity disruptions, and high bit error rates. In DTNs, the design of an efficient routing algorithm is one of the key...