CIRCUITS

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Investigation of Asynchronous Pipeline Circuits Based on Bundled-Data Encoding: Implementation Styles, Behavioral Modeling,and Timing Analysis
《Tsinghua Science and Technology》2022年第3期559-580,共22页Yu Zhou 
supported in part by the Hainan Academician Innovation Platform (No. YSPTZX202036);in part by the Hainan Natural Science Foundation (No. 619MS054)。
As VLSI technology enters the post-Moore era, there has been an increasing interest in asynchronous design because of its potential advantages in power consumption, electromagnetic emission, and automatic speed scalin...
关键词：asynchronous pipeline circuits bundled-data encoding asynchronous circuit modeling 
Attribute-Based Encryption for Circuits on Lattices被引量：4
《Tsinghua Science and Technology》2014年第5期463-469,共7页Jian Zhao Haiying Gao Junqi Zhang 
In the previous construction of attributed-based encryption for circuits on lattices, the secret key size was exponential to the number of AND gates of the circuit. Therefore, it was suitable for the shallow circuits ...
关键词：attribute-based encryption LATTICE Learning With Errors （LWE） CIRCUITS 
Probabilistic Delay Fault Model for DVFS Circuits
《Tsinghua Science and Technology》2011年第4期399-407,共9页雷庭 孙义和 Joan Figueras 
Supported in part by the National Natural Science Foundation of China (No. 60236020);the MCyT and FEDER Projects TEC2010
Decreasing the power supply voltage in dynamic voltage frequency scaling to save power con- sumption may introduce extra delays in CMOS circuits, which may cause errors. This paper presents the probabilistic delay fau...
关键词：dynamic voltage frequency scaling delay fault timing violation probability 
Recent Advance in Non-Krylov Subspace Model Order Reduction of Interconnect Circuits
《Tsinghua Science and Technology》2010年第2期151-168,共18页Sheldon X.-D. Tan 
Supported in part by National Science Foundation (NSF) (Nos.CCF-0448534 and OISE-0929699);in part by the National Natural Science Foundation of China (No. 60828008)
Model order reduction of interconnect circuits is an important technique to reduce the circuit complexity and improve the efficiency of post-layout verification process in the nanometer VLSI design. Existing works usi...
关键词：model order reduction balanced realization INTERCONNECT 
Efficient Scheme for Optimizing Quantum Fourier Circuits
《Tsinghua Science and Technology》2008年第1期54-58,共5页姜敏 张曾科 Tzyh-Jong Tarn 
the National Natural Science Foundation of China (Nos. 60433050 and 60274025);the U.S. Army Research Office (No. W911NF-04-1-0386)
In quantum circuits, importing of additional qubits can reduce the operation time and prevent decoherence induced by the environment. However, excessive qubits may make the quantum system vulnerable. This paper descri...
关键词：quantum Fourier circuits quantum gates optimization additional qubits 
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