边界扫描板级链路测试性设计方法研究  

Research of DFT for Board Level BS Chain Based on Boundary Scan Technology

作　　者：刘明云[1] 李桂祥[2] 张贤志[2] 杨江平[2] 

机构地区：[1]空军雷达学院研究生队,湖北武汉430019 [2]空军雷达学院雷达系统工程系,湖北武汉430019

出　　处：《半导体技术》2004年第11期12-16,共5页Semiconductor Technology

摘　　要：边界扫描技术是一种新型的VLSI电路测试及可测性设计方法。但是在扫描链路的设计中如何将不同厂家、不同型号、不同工作电压的BS器件实现JTAG互连,如何将边界扫描测试、在线编程和在线仿真结合起来一直是一个亟待解决的问题。为解决上述问题,本文提出了两种基于边界扫描技术的板级动态链路设计方法。这种可测性设计技术不仅能完成边界扫描测试,还能完成在线编程或在线仿真等功能,具有很好的测试设计灵活性。Boundary-scan technology (BST) is a new and effective way of test and design-for-testability(DFT) for VLSI circuits. In the process of practical application of BST,we facedwith some problems to be resolved imminently, such as how to achieve the JTAG interconnectsamong the boundary scan (BS) devices that coming from different manufactories,belonging todifferent types and having different working voltages, as well as how to combine BS testing,in-system-programming (ISP) and in-system-emulation together,for resolving them,two designmethods of board level dynamic BS chin based on boundary scan technology are proposed withgood flexibility for DFT.

关 键 词：路测 链路 可测性设计 边界扫描测试 边界扫描技术 VLSI电路 互连 在线编程 扫描链 测试性设计 

分 类 号：TN929[电子电信—通信与信息系统] TN407[电子电信—信息与通信工程]