低阻硅衬底上形成的低损耗共平面波导传输线  

LOW-LOSS CPW LINE ON LOW-RESISTIVITY SILICON

作　　者：葛羽屏[1] 郭方敏[1] 王伟明[1] 徐欣[1] 游淑珍[1] 邵丽[1] 于绍欣[1] 朱自强[1] 陆卫[2] 

机构地区：[1]华东师范大学信息科学与技术学院,上海200062 [2]中国科学院上海技术物理所红外物理国家重点实验室,上海200083

出　　处：《红外与毫米波学报》2004年第5期357-359,共3页Journal of Infrared and Millimeter Waves

基　　金：国家 973集成微光机电系统研究 (G19990 3 3 10 5 ) ;国家自然科学基金 ( 69975 40 9;10 3 740 95 );上海应用材料研究与发展基金项目 ( 0 3 0 6)

摘　　要：在厚膜多孔硅 (PS) /氧化多孔硅 (OPS)衬底上 ,结合聚酰亚胺涂层改善表面 ,研制低损耗、高性能射频 (RF) /微波 (MW)共平面波导CPW(CoplanarWaveguide) .通过在N和P型硅上形成不同厚度PS膜 ,并对其上的CPW进行分析比较 ,厚膜PS与石英的共面波导插入损耗非常接近 ,远小于在 2 0 0 0Ω·cm高阻硅上形成的多晶硅 -氧化硅组合衬底 :在 0 33GHz范围 ,插入损耗小于 5dB/ 1.2cm ;33 4 0GHz范围 ,小于 7.5dB/ 1.2cm .Low loss and high performance RF/microwave CPW (coplanar waveguide) were fabricated on thicker porous silicon( PS) / oxidized porous silicon( OPS) substrate associated with polyimide coating to improve smoothness. PS films with different thickness were formed on both N and P-type Si, and the CPW losses on them were discussed. The CPW loss on thick PS is intimately close to quartz, and much lower than the combined substrate of poly-Si / oxidized poly-Si growing on a 2000Omega (.) cm Si wafer. The insertion loss on PS was lower than 5dB/1.2cm in the range of 0-33GHz, and less than 7. 5dB/1.2cm in 33-40GHz.

关 键 词：共平面波导 硅衬底 厚膜 插入损耗 传输线 CPW 高阻硅 GH 微波 射频 

分 类 号：TN623[电子电信—电路与系统] TN405