低功耗10Gb/s CMOS1:4分接器  

A Low-Power 10 Gb/s CMOS 1:4 DEMUX IC

作　　者：蒋俊洁[1] 冯军[1] 李有慧[1] 熊明珍[1] 

机构地区：[1]东南大学射频与光电集成电路研究所,南京210096

出　　处：《电子器件》2005年第4期788-791,共4页Chinese Journal of Electron Devices

摘　　要：采用TSMC0.18μmCMOS工艺实现了一个应用于光纤通信系统SDHSTM-64的10Gb/s1∶4分接器,整个系统采用树型结构,由一个高速1∶2分接单元,两个低速1∶2分接单元,分频器,数据及时钟输入输出缓冲组成,其中高速分接单元采用共栅结构,单时钟输入的触发器实现;而低速分接单元则由动态CMOS逻辑实现,两个基本结构的使用都有利于降低功耗。该芯片工作速度最高达12.5Gb/s,功耗仅为120mW。A 10 Gb/s 1：4 DEMUX fabricated in 0.18 μm CMOS technology for optical-fiber-link is constructed in tree forms including a high speed 1 ： 2 demultiplexer cell, two low speed 1-2 demultiplexer cells, divider, input and output buffers for data and clock . To realize the reduction of power dissipation, a D flip-flop structure with a common-gate topology and a single clock phase is utilized in the high-speed 1 ： 2 DEMUX cell, while dynamic CMOS logic in the low-speed 1 ： 2 DEMUX cell. Simulation results show it can properly work up to 12.5 Gb/s with a only 120 mW power dissipation.

关 键 词：光纤通信 CMOS 分接器 低功耗 

分 类 号：TN818[电子电信—信息与通信工程]