12-Gb/s0.25-μmCMOS1:4分接器  

12-Gb/s 1:4 demultiplexer in 0.25-μm CMOS

作　　者：王贵[1] 王志功[1] 朱恩[1] 冯军[1] 王欢[1] 丁敬峰[1] 章丽[1] 熊明珍[1] 

机构地区：[1]东南大学射频与光电集成电路研究所,江苏南京210096

出　　处：《电路与系统学报》2006年第2期133-135,132,共4页Journal of Circuits and Systems

基　　金：国家863计划项目(2001AA312050)

摘　　要：介绍光纤传输系统的组成,分析1:4分接器的树型结构,并给出其主要特点。在此基础上,进一步探讨树型结构中所用的1:2分接器,并给出其中的锁存器电路结构。此外,讨论了起重要作用的匹配电路以及驱动电路。电路采用标准的0.25μmCMOS工艺设计并实现。实际测试结果显示该电路能够稳定地在STM-16至STM-64所要求的数据速率下工作,最高工作速率为12.92Gb/s。Based on the introduction of optical communication system and the analysis of the tree architecture of 1：4 demultiplexer and its specifications as well, detailed researches of 1：2 demultiplexer in tree architecture and its latch structure are presented. In addition, the important matching circuit and driven circuit are discussed. The chip is realized in standard 0.25μm CMOS technology. Wafer test shows that the circuit works steadily at the required data rate of STM-16 and STM-64, with the maximum data rate up to 12.92Gb/s.

关 键 词：光纤通信 分接器 CMOS 

分 类 号：TN772[电子电信—电路与系统]