用于先进PCB制造工艺的叠层封装(英文)  

Package-on-Package (PoP) for Advanced PCB Manufacturing Process

作　　者：Joseph Y. Lee Jinyong Ahn JeGwang Yoo Joonsung Kim Hwa-Sun Park Shuichi Okabe 

机构地区：[1]Samsung Electro-Mechanics Co. LTD. Suwon, Gyunggi-Do, Korea 443-743

出　　处：《电子工业专用设备》2007年第5期40-50,共11页Equipment for Electronic Products Manufacturing

摘　　要：在20世纪90年代,球栅阵列封装(BGA)和芯片尺寸封装(CSP)在封装材料和加工工艺方面达到了极限。这2种技术如同20世纪80年代的表面安装器件(SMD)和70年代通孔安装器件(THD)一样,在电学、机械、热性能、尺寸、质量和可靠性方面达到最大值。目前,三维封装正在成为用于未来采用的先进印制板(PCB)制造工艺的下一个阶段。它们可以分为圆片级封装、芯片级封装、和封装面。叠层封装(PoP)是一种封装面叠层封装类型的三维封装技术[15]。In the 1990＇s, both BGA （Ball Grid Array） and CSP （Chip Size Package） are entering their end in the front-end packaging materials and process technology. Both BGA and CSP like SMD （Sur- face Mount Device） from the 1980＇s and THD （Through-Hole mount Device） from the 1970＇s are reaching its own impasse in terms of maximizing its electrical, mechanical, and thermal performances, size, weight, and reliability. Now, 3D packages are the next phase for its future use in advanced PCB manufacturing process. They can be classified into wafer level, chip level, and package level stacking. So, package-on-package （POP）, a type of 3D package level stacking, is to be discussed in this paper.

关 键 词：三维封装 叠层封装 三维芯片叠层封装 多芯片封装 折叠封装 

分 类 号：TN305.94[电子电信—物理电子学]