两个低开销抗单粒子翻转锁存器  

Low-Overhead SEU-Tolerant Latches

作　　者：王亮[1] 赵元富[1] 岳素格[1] 

机构地区：[1]北京微电子技术研究所,北京100076

出　　处：《微电子学与计算机》2007年第12期221-224,共4页Microelectronics & Computer

摘　　要：提出了两个抗单粒子翻转(SEU)的锁存器电路SEUT-A和SEUT-B。SEU的免疫性是通过将数据存放在不同的节点以及电路的恢复机制达到的。两个电路功能的实现都没有特殊的器件尺寸要求,所以都可以由小尺寸器件设计完成。提出的结构通过标准的0.18μm工艺设计实现并仿真。仿真结果表明两个电路都是SEU免疫的,而且都要比常规非加固的锁存器节省功耗。和传统的锁存电路相比,SEUT-A只多用了11%的器件数和6%的传输延时,而SEUT-B多用了56%的器件数,但获得了比传统电路快43%的速度。Two latches, named SEUT-A and SEUT-B respectively, designed to tolerate radiation-induced Single Event Upset （SEU） are presented. SEU immunity is achieved by storing data on different nodes and through the recovery mechanism of the circuits. Neither of the designs needs transistor sizing to be functional and SEU-tolerant, so it can be implemented by small devices. The proposed structures are implemented and simulated using a standard 0.18μm logic process model. Simulation results show that both of the proposed latches are SEU immune and less power-consumptive compared to the conventional unhardened one. SEUT-A uses only 11% more transistors and is 6% slower, whereas SEUT-B uses 56% more transistors but is 43% faster than the conventional one.

关 键 词：单粒子翻转 SEU 锁存器 辐射加固 CMOS 设计加固 

分 类 号：TN4[电子电信—微电子学与固体电子学]