高压双扩散漏端MOS晶体管双峰衬底电流的形成机理及其影响  

Mechanism and impact of the double-hump substrate current in high-voltage double diffused drain MOS transistors

作　　者：王俊[1] 王磊[1] 董业民 邹欣 邵丽 李文军 杨华岳 

机构地区：[1]中国科学院上海微系统与信息技术研究所 [2]上海宏力半导体制造有限公司,上海201203

出　　处：《物理学报》2008年第7期4492-4496,共5页Acta Physica Sinica

摘　　要：利用0.15μm标准CMOS工艺制造出了工作电压为30V的双扩散漏端MOS晶体管(double diffused drain MOS,DDDMOS).观察到DDDMOS的衬底电流-栅压曲线(Ib-Vg曲线)有两个峰.通过实验和TCAD模拟揭示了DDDMOS衬底电流的形成机理,发现衬底电流第一个峰的成因与传统MOS器件相同;第二个峰来自于发生在漂移区远离沟道一侧高场区的碰撞离化电流.通过求解泊松方程和电流连续性方程,分析了器件的物理和几何参数对导致衬底电流重新上升的漂移区电场的影响.在分析了DDDMOS衬底电流的第二个峰形成机理的基础上,考察了其对器件的可靠性的影响.A 30-volt double diffused drain MOS （DDDMOS） is fabricated with standard 0.15μm CMOS process. The substrate current of this DDDMOS is investigated and the two-humps of Ib- Vg curves is observed. The origin of these two humps of substrate current is demonstrated by experiments and TCAD simulation. The cause of first peak is the same as that in conventional MOS device; the second hump is caused by the impact ionization under high electric field in the drift region far away from the channel edge. The correlation between the electric field and the device parameters is studied through the Poisson＇ s Equation and Current continuity equation. Based on the mechanism of the second hump of Ib, its impaction on device reliability is studied.

关 键 词：高压器件 衬底电流 可靠性 

分 类 号：TN386[电子电信—物理电子学]