扩展电阻技术测试外延片外延厚度误差分析  

Analysis on Epitaxy Wafer Thickness Error Measuring in Spreading Resistance Profile

作　　者：张志勤[1] 李胜华[1] 张秀丽[1] 

机构地区：[1]中国电子科技集团公司第十三研究所,石家庄050002

出　　处：《半导体技术》2008年第10期905-908,共4页Semiconductor Technology

摘　　要：扩展电阻法利用测量纵向深度电阻率的变化获得外延片厚度。实际外延片测试过程中,经常发生扩展电阻测试仪测量硅外延片厚度误差较大的问题,从三个方面分析了产生的原因,其中两方面存在于样品制备过程:样品研磨角度不等于垫块角度造成的误差;研磨斜面两条边缘不平行造成的误差。另外一方面存在于测试过程,测试仪两探针起始位置偏离样品表面和研磨斜面的边界线造成的误差。由样品制备引起的误差占实际误差的大多数,所有误差均可通过计算公式进行修正。By spreading resistance profile technology, Si epitaxy thickness value was obtained through measuring the changing of depth resistivity. In measuring of Si epitaxial wafer, errors on thickness value often happen. The reasons of error were analyzed from three parts, two exist in sample fabrication： one is caused by lapping bevel angles unequal to mount angles, the other is caused by lapping bevel offset. The third one exists in measurement process： it is because of the offset between probes initial points location and edge between sample surface and bevel. Most errors are due to sample fabrication, so all the errors can be corrected through formulas.

关 键 词：扩展电阻 硅外延 厚度误差 过渡区 

分 类 号：TN304.054[电子电信—物理电子学] TN304.12