基于BiCMOS工艺的D类功率放大器设计  

CLASS-D AMP Design and Development base on BiCMOS Process

作　　者：朱洲[1] 李冰[1] 肖志强[1] 

机构地区：[1]东南大学IC学院,南京210096

出　　处：《电子与封装》2009年第5期28-30,38,共4页Electronics & Packaging

摘　　要：文章首先详细研究了D类音频放大器和相关的BiCMOS的基本原理和结构,并在此基础上综合现阶段国内市场对D类功率放大器的需求,开发了基于0.6μm特征线宽、双层多晶、双层金属的多晶发射极BiCMOS工艺的D类功率放大器。该D类音频放大器,在5V电压下可以以1.4W/Ch的功率驱动阻抗为8的负载。它同样可驱动阻抗为4的负载,5V电压下提供的最大功率为2.1W/Ch。同时还详细描述了前置音频放大器,三角波产生电路、比较器,死区控制电路,输出驱动电路等子模块的设计内容。电路在Cadence环境下进行设计和仿真验证,经过仿真表明电路设计性能良好,符合设计要求,可广泛应用于便携式电子产品。In this dissertation, first study on the basic principle of class D power amplifier and BiCMOS process. After synthetizing requirement of home market at present stage, the circuit of class D power amplifier is designed basing on polysilicon emitter BiCMOS process of 0.6 μm double polysilicon double metal. This class D power amplifier can drive 8 load with 1.4W/Ch power at 5V supply. And can drive 4 load with 2.1W/Ch power at 5V supply. And then describe the module ofpre audio amplifier, triangle generator, comparator, death time control and output driver etc. This circuit is designed and simulated with cadence tools. And the result of simulation indicate that the circuit has better performance, and according the designing requirement, and can widely used in portable equipment

关 键 词：D类功率放大器 死区控制 H桥 BICMOS工艺 多晶发射极 便携式 

分 类 号：TN722.7[电子电信—电路与系统]