MOSFET和Poly-Si TFTs参数提取策略的研究  

Research on Parameters Extraction Strategy of MOSFET and Poly-Si TFTs

作　　者：魏长河[1] 郑学仁[1] 

机构地区：[1]华南理工大学微电子研究所,广州510640

出　　处：《半导体技术》2009年第7期653-657,共5页Semiconductor Technology

基　　金：国际合作项目(2006440003070462)

摘　　要：随着半导体制造技术的不断改善和工艺的不断升级,精确的模型参数对于代工厂和设计者尤为重要。而参数提取策略的选择是整个参数提取过程中的关键步骤。该研究以伯克利大学开发的SPICE Level-3MOSFET和多晶硅薄膜晶体管模型为研究对象,以包括了短沟效应、窄沟效应、漏致势垒降低效应的MOSFET阈值电压方程和多晶硅薄膜晶体管统一漏电流方程作为研究出发点,然后分别讨论了模型中几个主要参数的提取方法,最后给出了参数提取的流程图。Device model draws wide attention as the improvement and upgrade of semiconductor fabrication technology, accurate model parameter is very important for foundry and designer. It is a crucial step for the choice of extraction strategy during the extraction procedure. SPICE Level-3 MOSFET developed by Berkeley and poly-Si TFTs models were described, it focused on unified drain current equation of poly-Si TFTs and threshold voltage equation of MOSFET including short-channel effect, narrow-width effect, drain induced barrier lowering effect, the extraction strategy of some main model parameters were discussed respectively, and the flow charts of parameters extraction were proposed.

关 键 词：多晶硅薄膜晶体管 短沟效应 阈值电压 漏电流 参数提取 

分 类 号：TN303[电子电信—物理电子学]