压阻型集成电路封装应力测试芯片的研究与应用  

Study and Application of Piezoresistive Stress Test Chip for IC Packages

作　　者：贾松良[1] 朱浩颖[1] 罗艳斌 

机构地区：[1]清华大学微电子所

出　　处：《Journal of Semiconductors》1998年第11期812-817,共6页半导体学报（英文版）

摘　　要：本文介绍了一种（１００）硅片上的压阻型集成电路封装应力测试芯片的设计、制造、校准和应用测量情况．该应力测试芯片包含双极性４元素应力测试单元和偏轴３元素压阻系数校准单元．所用应力测试单元具有温度补偿、灵敏度高、抑制工艺对准误差的特点．采用四点弯曲法进行了硅压阻系数校准测量．采用其中一种应力测试芯片，测量了ＩＣ卡按ＩＳＯ７８１６－１标准规定的弯曲和扭曲情况下的芯片应力，发现：ＩＣ卡弯曲时主要受正应力，剪切应力较小；而扭曲时剪切应力较大。Abstract This paper presents the study of design, manufacturing, calibration, and application of a (100) silicon stress testing chip for IC packages. The piezoresistive stress test chip contains optimal dual polarity four elements piezoresistive sensor rosettes and off axis three elements piezoresistive coefficients calibration rosettes. The piezoresistive sensor rosettes offer high sensitivity to stress, and the outputs are both temperature compensated and insensitive to rotational alignment error. The piezoresistive coefficients are calibrated by using four point bending method, the π 44 of P type Si is about (75±5)×10 -5 /MPa,and the π D of N type Si is about (-91±13)×10 -5 /MPa. Using this stress test chip, we have studied the chip stress state of IC card under bending and twisting condition. The measurement results are: for upward bending along card’s long edge, the in plane normal stress difference | σ 11 - σ 22 | is about 75MPa, downward bending increases it by about 20%, the | σ 11 - σ 22 | for upward bending along card’s short edge is about 100MPa, the shear stress is small at bending condition. The in plane shear stress | σ 12 | for card twisting is about 25MPa, which is larger than normal stress.

关 键 词：压阻型 集成电路 封装 应力测试芯片 

分 类 号：TN407[电子电信—微电子学与固体电子学]