基于模块划分方法的MPEG-2解码芯片可测性设计  

Testability Design of MPEG-2 Decoder Chip Based on Module Partition

作　　者：廖富成[1] 乔飞[1] 周妮[1] 谭斯斯[1] 杨华中[1] 

机构地区：[1]清华信息科学与技术国家实验室清华大学电子工程系,北京100084

出　　处：《电视技术》2010年第11期35-39,共5页Video Engineering

基　　金：国家自然科学基金项目(60871005);教育部博士点基金(新教师基金)(200800031073);清华大学"结构化集成电路设计"课程研究项目(70230183)

摘　　要：以MPEG-2解码芯片为研究对象,采用基于模块划分方法进行可测性设计,包括边界扫描(JTAG)和内建自测试(BIST)。根据MPEG-2系统结构的特点,把模块划分为存储器类型、信号不相关类型和信号相关类型。针对模块特性,设计不同的测试向量生成器,3种类型模块之间并行测试。测试结果表明,与未加入可测试设计的系统比较,固定故障覆盖率由81%提升到95.1%,而硬件开销仅为3%。A module-based methodology is presented to enhance the testability of the MPEG-2 decoder, with JTAG and Built-In Self-Test （BIST） technology employed. Based on the architecture features of the MPEG-2 deeoder, modules are divided into three categories： memory modules, signal-correlated modules and signal-non-correlated modules. Based oil the characteristics of modules, different test pattern generators are proposed, and different modules are tested in parallel. The test results show that the presented design can promote the fault coverage rate from 81% to 95.1%, comparing with the same decoder system without thinking about testability, and the hardware cost is only 3%.

关 键 词：MPEG-2 可测性设计 边界扫描测试 内建自测试 故障覆盖率 

分 类 号：TN919.83[电子电信—通信与信息系统]