纳米级应变硅MOSFET的有限元与TCAD模拟研究  

Simulation on Nano-scale Strained-Si MOSFET by FEM and TCAD

作　　者：张庆东[1] 周东[1] 顾晓峰[1] 

机构地区：[1]江南大学信息工程学院,江苏无锡214122

出　　处：《固体电子学研究与进展》2011年第1期40-43,共4页Research & Progress of SSE

基　　金：教育部新世纪优秀人才支持计划(NCET-06-0484);教育部留学回国人员科研启动基金(教外司留[2008]890);江南大学自主科研计划资助(JUSRP20914)

摘　　要：基于有限元方法对一款具有SiGe源/漏结构的纳米PMOSEFT进行了建模与分析,沟道应变的计算结果与CBED实验测量值呈现良好的一致性,最小误差仅为1.02×10-4。对新型的SiC源/漏结构的纳米NMOSFET的类似研究表明,栅长越短,应变对沟道的影响越显著。另一方面,采用TCAD工具Sentaurus通过工艺级仿真生成了栅长为50 nm的SiGe源/漏结构的PMOSFET模型,计算所得饱和驱动电流与实际制作的器件相差仅约20μA/μm。研究表明有限元法与TCAD两种模拟技术可有效地用于纳米级应变硅器件的设计与优化。A nano-PMOSFET with SiGe S/D structure has been modeled and analyzed using the finite element method.Simulated channel strain is in good agreement with the results measured by CBED,showing the smallest error of only 1.02×10-4.Similar studies on a novel nano-NMOSFET with SiC S/D structure indicate that the channel strain is more significant at the shorter gate length.On the other hand,the TCAD tools Sentaurus have been used to generate a SiGe S/D PMOSFET model with a gate length of 50 nm by the process-level simulation.The calculated saturation driving current is different from that of an actually fabricated device by only 20 μA/μm.This work shows that both the finite element analysis and TCAD tools can be effectively used for design and optimization of nano-scale strained-Si devices.

关 键 词：应变硅 金属氧化物半导体场效应管 有限元分析 工艺与器件的计算机辅助设计 

分 类 号：TN386.1[电子电信—物理电子学] TN432