一种新型快速有限域乘法器设计实现  

Design and Implementation of A Novel Finite Field Multiplier for RS Encoder

作　　者：杨博[1] 张伟功[1] 丁瑞[1] 胡永勤[1] 

机构地区：[1]首都师范大学信息工程学院,北京100048

出　　处：《通信技术》2011年第5期169-171,共3页Communications Technology

基　　金：国家自然科学基金资助项目(批准号:60873006);北京市自然科学基金资助项目(No.4062009No.4082009);北京市教委重点项目(No.KZ200710028014)

摘　　要：介绍一种新型有限域乘法器,其基本原理是引入多项式拆分概念和多项式拆分方法,将m次的多项式拆分成两个m/2次多项式分别做有限域乘法,这样可以降低乘法运算的阶数,用加法计算电路来代替。并且根据这种算法设计了新型乘法器的电路实现,将这种新型乘法器并且与比特串行乘法器的仿真结果做对比。结果表明新型的有限域乘法器达到了较高的系统数据吞吐率,可以应用于纠错系统、RS编码器和译码器中。This paper describes a concept of ＂polynomial split＂,and based on this,a polynomial splitting method for RS encoder is proposed,and then a new finite field multiplier thus designed.This paper presents the theory of the new algorithm and the circuit of this new finite field multiplier.It also gives the circuit of bit serial multiplier,thus realizing a comparison of its efficiency to that of the new design.The simulation results show that new finite field multiplier could achieve a fairly high data throughput and low complexity,thus is suitable for error-correction system RS encoder and decoder.

关 键 词：有限域 乘法器 多项式乘法 纠错码 VHDL 

分 类 号：TN911.22[电子电信—通信与信息系统]