埋层低掺杂漏SOI高压器件的击穿电压  

Breakdown Voltage of BLD SOI High Voltage Devices

作　　者：李琦[1] 王卫东[1] 张杨[1] 赵秋明[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《微纳电子技术》2011年第9期553-557,共5页Micronanoelectronic Technology

基　　金：广西自然科学基金资助项目(2010GXNSFB013054);广西千亿元产业重大科技攻关工程项目(桂科攻11107001-20)

摘　　要：提出一种具有埋层低掺杂漏(BLD)SOI高压器件新结构。其机理是埋层附加电场调制耐压层电场,使漂移区电荷共享效应增强,降低沟道边缘电场,在漂移区中部产生新的电场峰。埋层电中性作用增加漂移区优化掺杂浓度,导通电阻降低;低掺杂漏区在漏极附近形成缓冲层,改善漏极击穿特性。借助二维半导体仿真器MEDICI,研究漂移区浓度和厚度对击穿电压的影响,获得改善击穿电压和导通电阻折中关系的途径。在器件参数优化理论的指导下,成功研制了700V的SOI高压器件。结果表明:BLD SOI结构击穿电压由均匀漂移区器件的204V提高到275V,比导通电阻下降25%。A new structure of the buried layer low doping drain（BLD） SOI high voltage device was proposed.Its mechanism is that through the modulation of the buried layer additive electric field on the compression layer electric field,the charge sharing effect in drift region is enhanced,the electric field at the channel edge is decreased,and the new electric field peak is produced in the central drift region.Due to the neutralism of the buried layer,the optimized doping concentration of drift region is increased,and the on-resistance is decreased.The drain breakdown cha-racteristic is improved due to the formation of the buffer layer for the low doping drain region in the drain nearby.Using 2D semiconductor emulator MEDICI,the effects of the thickness and doping concentration for the drift region on the breakdown voltage were studied,and the approach of improving the compromising relationship between the breakdown voltage and on-resistance was gained.The 700 V SOI high voltage device was fabricated under the guidance of the device parameter optimization theory.The result shows that comparing to the conventional device with the uniform drift region,the breakdown voltage of the BLD SOI structure device increases from 204 V to 275 V,and the specific on-resistance decreases 25%.

关 键 词：埋层 低掺杂漏 击穿电压 调制 导通电阻 掺杂浓度 

分 类 号：TN386.1[电子电信—物理电子学]