基于RHBD技术的深亚微米抗辐射SRAM电路的研究  

Study on the Deep Submicron Radiation Hardened SRAM Circuit for RHBD Technologies

作　　者：王一奇[1] 赵发展[1] 刘梦新[1] 吕荫学[1] 赵博华[1] 韩郑生[1] 

机构地区：[1]中国科学院微电子研究所,北京100029

出　　处：《半导体技术》2012年第1期18-23,共6页Semiconductor Technology

基　　金：国家科技重大专项基金资助项目(2009ZX02305-008)

摘　　要：研究了目前业内基于抗辐射加固设计(RHBD)技术的静态随机存储器(SRAM)抗辐射加固设计技术,着重探讨了电路级和系统级两种抗辐射加固方式。电路级抗辐射加固方式主要有在存储节点加电容电阻、引入耦合电容、多管存储单元三种抗辐射加固技术;系统级抗辐射加固方式分别是三态冗余(TMR)、一位纠错二位检错(SEC-DED)和二位纠错(DEC)三种纠错方式,并针对各自的优缺点进行分析。通过对相关产品参数的比较,得到采用这些抗辐射加固设计可以使静态随机存储器的软错误率达到1×10-12翻转数/位.天以上,且采用纠检错(EDAC)技术相比其他技术能更有效提高静态随机存储器的抗单粒子辐照性能。Industrial SRAM radiation hardened design technologies based on RHBD technologies were studied. Two radiation hardened ways of the circuit level and system level were emphasized. RHBD technologies such as capacitance or resistance added in storage nodes, coup between storage nodes and multi-transistors cell were presented in the circuit level DEC were introduced in the system level respectively, and the main advantages led capacitance added ~ TMR, SEC-DED and and disadvantages were analyzed. By comparison of correlative products, the soft error rate can be up to 1 × 10^-12 upset/bit · d by radiation hardened circuit technologies, and EDAC technology can improve the SEE performance of SRAM better than other radiation hardened design technologies.

关 键 词：静态随机存储器 单粒子 抗辐射加固设计 抗辐射加固 纠检错 

分 类 号：TN432[电子电信—微电子学与固体电子学]