驱动能力对SOI SRAM单元单粒子效应的影响仿真  

Circuit Simulation of Drive Power Effect on SEU for SOI SRAM Cells

作　　者：徐静[1] 陈玉蓉[1] 洪根深[1] 

机构地区：[1]中国电子科技集团公司第58研究所,江苏无锡214035

出　　处：《电子与封装》2012年第7期34-37,共4页Electronics & Packaging

基　　金：SOI集成电路研发中心基金资助项目(62501100414)

摘　　要：采用silvaco软件对抗辐射不同沟道宽度的PD SOI NMOS器件单元进行了三维SEU仿真,将瞬态电流代入电路模拟软件HSPICE中进行SRAM存储单元单粒子翻转效应的电路模拟。通过这种电路模拟的方法,可以得到SRAM存储单元的LET阈值。通过对比LET阈值的实际测量值,验证了这种方法的实用性,并对不同驱动能力的SRAM单元进行了翻转效应的对比。在NMOS和PMOS驱动比相同的情况下,沟道宽度越大,SRAM的翻转LET阈值反而越高。A transient current pulse in a single event effect is comfirmed by the results from 3D PD SO1 NMOS device. The transient current pulse can be used to simulate the SEU of an SRAM cell in the circuit simulation tool HSPICE.The critical LET of an SRAM cell is obtained by circuit simulation.The practicability of this method is verified by comparing the critical LET of simulation and measuring Finally, a contrast has been made between different drive power circuit simulation of SEU for SRAM cells.With the same ratio of drive power between NMOS and PMOS, the larger is the channel width, the higher is the critical LET of an SRAM cell.

关 键 词：SOI SEU 三维仿真 

分 类 号：TN305[电子电信—物理电子学]