700V三层RESURF nLDMOS优化设计  

Optimal Design of 700 V Triple RESURF nLDMOS

作　　者：孙鹏[1,2] 刘玉奎[3] 陈文锁[3] 

机构地区：[1]重庆邮电大学,重庆400065 [2]模拟集成电路重点实验室,重庆400060 [3]中国电子科技集团公司第二十四研究所,重庆400060

出　　处：《微电子学》2013年第2期278-281,共4页Microelectronics

摘　　要：提出了一种利用高能离子注入形成的700V三层RESURF结构nLDMOS。与双RESURF结构漂移区表面注入形成P-top层不同,三层RESURF结构在漂移区内部形成P型埋层,漂移区表面保留一条N型导电通路,导通电阻有所降低。利用Sentaurus TCAD仿真软件,分析各参数对器件击穿电压和导通电阻的影响。与普通单RESURF和双RESURF结构相比,三层RESURF LDMOS器件的优值(FOM)得到提高,三种结构的优值之比为1∶1.75∶2.03。A 700 V triple RESURF nLDMOS was designed using high energy ion implantation.Unlike double RESURF nLDMOS,which has a P-type layer on the surface of the drift region,the P-type layer of triple RESURF nLDMOS is located in the middle of the drift region.Therefore,there is an N-type conduction path on the surface of the drift region.The new structure has lower on-resistance.Effects of parameters on breakdown voltage and specific on-resistance were analyzed by using device simulator Sentaurus TCAD.Compared with conventional single RESURF and double RESURF device structure,figures of merit（FOM） of the triple RESURF structure were greatly improved.The FOM ratio of single-,double-and triple-RESURF structures was 1∶1.75∶2.03.

关 键 词：横向双扩散金属-氧化物-半导体 降低表面电场 击穿电压 比导通电阻 

分 类 号：TN386[电子电信—物理电子学]