基于0.18μm工艺SOI技术60V LDMOS的设计与分析  

0.18 μm 60 V SOI LDNMOS Technology Design and Analysis

作　　者：戚帆[1] 檀柏梅[1] 翁坤[2] 宋雯[1] 

机构地区：[1]河北工业大学微电子技术与材料研究所,天津300130 [2]福州大学福建省微电子集成电路重点研究室,福州350002

出　　处：《电子器件》2013年第2期139-142,共4页Chinese Journal of Electron Devices

基　　金：天津市科技支撑计划项目(10ZCKFGX1300)

摘　　要：随着功率器件尺寸的不断缩小,绝缘体上硅技术所受的关注度日益增加。在0.18μm工艺条件下基于SOI技术,运用SILVACO公司的工艺仿真(Athena)和(Atlas)器件仿真模拟软件,完成了对60 V LDMOS的设计与分析,对不同沟道管宽度的器件进行研究,并结合实际流片的测试结果,对器件直流性能进行了表征与分析,发现SOI器件无明显的由氧化埋层隔离作用所产生的显著影响器件性能的浮体效应和kink效应,实现了性能优良的小尺寸60 V LDMOS器件。With the ever-shrinking size of power devices,the attention of SOI technology is increasing.60 V LDMOS devices were designed and analyzed based on SOI technology with 0.18 μm process by using SILVACO company process（Athena）and device（Atlas）simulation software.The devices were researched by the different channel width.The DC characteristics of devices were analyzed by tapeout results.Therefore,the significant influence of the devices floating bodies effect and kink effect brought by the buried oxide layer in SOI device are not obvious.The design has realized a very good optimized 60 V LDMOS in smaller size.

关 键 词：绝缘体上硅 LDMOS 器件流片测试 器件结构 直流特性 

分 类 号：TN386[电子电信—物理电子学]