GaAs PHEMT通信开关电路设计  

Design of GaAs PHEMT Communication Switch

作　　者：白元亮[1] 田国平[2] 

机构地区：[1]中国电子科技集团公司第十三研究所,石家庄050051 [2]专用集成电路重点实验室,石家庄050051

出　　处：《半导体技术》2013年第9期656-660,共5页Semiconductor Technology

摘　　要：设计制作了GaAs PHEMT通信开关电路。分析了基于GaAs场效应晶体管(FET)的正压控制开关电路原理,采用GaAs FET器件串并联结构设计了单刀双掷(SPDT)和双刀双掷(DPDT)开关电路。使用ADS软件对电路进行了优化设计,并对电路版图进行了电磁场仿真优化,基于0.5μm GaAs PHEMT工艺,流片制作了SPDT和DPDT开关电路。测试结果表明,在DC^6 GHz带宽内,SPDT开关插损大于-0.75 dB,隔离度小于-27 dB(3 GHz),回波损耗小于-18 dB,芯片尺寸为0.55 mm×0.50 mm。DPDT开关插损大于-1.8 dB,隔离度小于-20 dB(3 GHz),回波损耗小于-12 dB,芯片尺寸为0.65 mm×0.60mm。两种开关均采用正电压控制(+5 V),具有低插损、高隔离度、大功率处理能力(P1 dB大于30 dBm)和芯片尺寸小等优点,可广泛应用于微波通信系统中。Communication switches based on GaAs PHEMT were designed and implemented. Positive voltage controlled switch circuit based on GaAs FET were analyzed, single-pole double-throw （SPDT） and double-pole double-throw （DPDT） switches with series-shunt FET configuration were designed, the circuits were optimized with ADS software, and the layout was also optimized with electromagnetic field simulation. SPDT and DPDT switches were fabricated using GaAs 0.5 μm PHEMT process. The test results show that, in the frequency range of DC - 6 GHz, for SPDT, the insertion loss （IL） is more than -0.75 dB, the isolation （ISO） is less than -27 dB （3 GHz） , return loss （RL） is less than -18 dB with chip area of 0. 55 mmx0.50mm. ForDPDT, the IL is more than -1.8 dB, the ISO is less than -20 dB（3 GHz）, the RL is less than -12 dB with chip area of 0.65 mm x 0.60 mm. The two kinds of switches have merits of voltage positive controlled （ ＋ 5V） , low insertion loss, high isolation, high power handling capability （PI dBis more than 30 dBm） and small chip size. These switches can be used in microwave communication systems.

关 键 词：GAAS PHEMT 正压控制 单刀双掷（SPDT） 双刀双掷（DPDT） 

分 类 号：TN43[电子电信—微电子学与固体电子学] TN304.23