检索规则说明:AND代表“并且”;OR代表“或者”;NOT代表“不包含”;(注意必须大写,运算符两边需空一格)
检 索 范 例 :范例一: (K=图书馆学 OR K=情报学) AND A=范并思 范例二:J=计算机应用与软件 AND (U=C++ OR U=Basic) NOT M=Visual
作 者:柳龙华[1] 杜丽军[1] 解启林[1] 邱颖霞[1]
机构地区:[1]中国电子科技集团公司第38研究所,合肥230088
出 处:《电子与封装》2013年第12期26-29,共4页Electronics & Packaging
基 金:装备预先研究项目(51318070119)
摘 要:基于薄膜电路工艺制作的共面波导延迟线不仅具有体积小、重量轻、损耗低、抗干扰性强等优点,还易与其他微波电路集成,延时精度较准。但它对高精度、密集孔薄膜电路的制作提出了更高的要求。通过优化薄膜电路制作工艺流程,研制出图形精度优于±5μm,具有良好金属化通孔的X波段两位延迟线薄膜电路。测试结果显示,该X波段两位延迟线的插入损耗为-5.7~-4.6 dB,带内起伏优于±0.3 dB,中心频率点相位偏差为±5°,满足设计要求。The coplanar waveguide true-time delay line, which is fabricated by thin film hybrid circuit's process, has several advantages such as small volume, light weight, low insert loss, and high anti-interference. It also can integrate with other microwave circuits conveniently, and the precision of true-time delay is exactly. Certainly, the fabrication of thin film hybrid circuit with high precision pattern and denseness vias process is more difficult. Through optimize the fabrication process, an X-band 2 bits true-time delay line thin film circuits has been fabricated. The microstrip precision is better than ± 5 μm. As show by the test results, the insert loss of 2 bits true-time delay line is -5.7~-4.6 dB, the in-band loss variation is less than ± 0.3 dB, and the phase bias at operating frequencies is ±5°.
分 类 号:TN451[电子电信—微电子学与固体电子学]
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在链接到云南高校图书馆文献保障联盟下载...
云南高校图书馆联盟文献共享服务平台 版权所有©
您的IP:216.73.216.249