IC封装无芯基板的发展与制造研究  

Development & Manufacture Research of Coreless Substratefor IC Packages

作　　者：侯朝昭 邵远城 李茂源[1] 胡雅婷[1] 安兵[1] 张云[1] 

机构地区：[1]华中科技大学材料学院,湖北武汉430074

出　　处：《电子工艺技术》2014年第4期187-189,233,共4页Electronics Process Technology

基　　金：国家自然科学基金项目(项目编号:60976076)

摘　　要：手持电子产品的薄型化催生了IC封装无芯基板,它不仅比IC封装有芯基板更薄,而且电气性能更加优越。介绍了IC封装无芯基板的发展趋势和制造中面临的问题。IC封装无芯基板以半加成法制造,翘曲是目前制程中的首要问题。翘曲改善主要依靠改变绝缘层材料和积层结构,可用云纹干涉法进行量测,并以模拟为指导加快开发周期。The thinning tendency of the handheld electronic products brought up the coreless substrate for IC Packages. Coreless substrate enables thinner thickness and superior electrical performance than core-contained substrate. Introduce the development trend and problems occurred during the manufacturing process of the coreless substrate. The coreless substrate is manufactured by the semi-additive method, and warpage is the primary problem during the process currently. The reduction of warpage mainly depends on the optimization of the insulated-layer materials and as well the construction of buildup layers. Warpage can be measured by Shadow Moiré method and simulated by FEA software, which can be used as the guidance to accelerate development cycle.

关 键 词：无芯基板 IC封装基板 翘曲 半加成法 云纹干涉法 

分 类 号：TN41[电子电信—微电子学与固体电子学]