6英寸高均匀性P型硅外延片的工艺研究  

The Research of the Process on the 6-inch P-type Silicon Epitaxial Wafer with High Uniformity

作　　者：吕婷[1] 李明达[1] 陈涛[1] 

机构地区：[1]中国电子科技集团公司第46研究所,天津300220

出　　处：《电子与封装》2015年第9期36-39,共4页Electronics & Packaging

摘　　要：主要进行了6英寸(152.4 mm)高均匀性P型硅外延片的生产工艺研究。利用PE-2061S型桶式外延炉,在重掺硼的硅衬底上化学气相沉积P/P+型硅外延层。通过流场调节工艺、基座包硅工艺、变流量解吸工艺、两步生长工艺等关键工艺的改进,对非主动掺杂效应进行了有效抑制,利用FTIR(傅里叶变换红外线光谱分析)、C-V(电容-电压测试)、SRP(扩展电阻技术)等测试方法对外延层的电学参数以及过渡区形貌进行了测试,得到结晶质量良好、厚度不均匀性<1%、电阻率不均匀性<1.5%的6英寸P型高均匀性硅外延片,各项参数均可以达到器件的使用要求。The paper mainly describes a kind of practical production process with the 6-inch silicon epitaxial wafers with high uniformity. Using the PE-2061S barrel-type epitaxial furnace, required 6-inch P/P＋-type silicon epitaxial layer was prepared on the heavily B-doped silicon substrate by chemical vapor deposition. The key processes such as the flow field adjusting process, the susceptor coating with silicon process, variable flow rate process and the two-step growth process were effectively improved. The electricity parameter as well as the transition region morphology of the epitaxial layer was analyzed by using some testing methods such as FTIR （Fourier-Transform Infrared Spectrophotometry） , C-V, SRP （spreading resistance profile） and so on. Finally, P/P＋-type silicon epitaxial wafers were successfully prepared, and all the parameters were adapted to the design requirements of devices, such as good crystallization quality, the thickness nonuniformity 〈 1%, the resistivity nonuniformity 〈 1.5%.

关 键 词：6英寸 均匀性 P型硅外延 非主动掺杂 

分 类 号：TN304.05[电子电信—物理电子学]