一种可集成高密度氮氧化硅介质工艺  

An Integrated and High Density Process of SiON Dielectric Material

作　　者：张杨波[1] 唐昭焕[2] 阚玲[1] 任芳[1] 

机构地区：[1]中国电子科技集团公司第二十四研究所,重庆400060 [2]模拟集成电路重点实验室,重庆400060

出　　处：《微电子学》2017年第1期122-125,共4页Microelectronics

摘　　要：针对传统二氧化硅、氮化硅等介质材料在制作MOS电容时存在电容密度低、界面特性差的问题,通过对氮离子注入、氮硅氧化实验的分析,成功开发出一种采用注入氮并氧化制作氮氧化硅介质材料的工艺;并使用该工艺研制出与36V双极工艺兼容、介质的相对介电常数为5.51、击穿电压达81V、电容密度为0.394fF/μm^2的高密度MOS电容,较传统可集成二氧化硅/氮化硅复合介质电容的电容密度提高了35.86%。该工艺还可用于制作大功率MOSFET的栅介质,可提高器件的可靠性。In order to improve the capacitance density and interface property of a MOS capacitor fabricated in conventional common oxide（SiO2 ） or silicon-nitride（Si3 N4 ） dielectrics, the nitrogen ion implantation and nitrogen- silicon oxidation were experimented, and a novel process of the silicon oxynitride（SiON） was successfully developed by nitrogen ion implantation and oxidation. The dielectric material was used in a MOS capacitor integrated in a 36 V bipolar process. Test results showed that the dielectric constant was 5.51, the breakdown voltage was 81 V and the capacitance density was 0.394fF/μm-2. The capacitance density was enhanced by 35.86% compared with that of traditional integrated SiO2/Si3N4 composite dielectrics capacitor. The dielectric process could also be used to fabricate the gate dielectric of power MOSFET to improve the device＇s reliability.

关 键 词：氮氧化硅 相对介电常数 电容密度 介质 MOS电容 

分 类 号：TN431[电子电信—微电子学与固体电子学]