异质外延用硅单晶片边缘质量控制技术研究  

Investigation on the Edge Quality Control of Silicon Wafers Used in Heteroepitaxy

作　　者：杨洪星[1] 范红娜[1] 刘玉岭[1] 陶术鹤 何远东[1] 

机构地区：[1]中国电子科技集团公司第四十六研究所,天津300220

出　　处：《中国电子科学研究院学报》2017年第6期632-635,共4页Journal of China Academy of Electronics and Information Technology

摘　　要：异质外延在LED、高性能光电集成电路(OEIC)等多种领域存在广泛应用。Si基衬底由于具有优良性能,广受关注。Si基衬底异质外延时,由于Si与异质外延层之间的晶格失配和热失配,一般需要在衬底上生长一层缓冲层,而后在缓冲层上生长异质外延层。Si衬底损伤层对缓冲层成核具有较大的影响,进而对异质外延层造成重大影响。本文以硅单晶片边缘质量控制为切入点,开展了异质外延用硅单晶片的研究。Heteroepitaxy is widely used in LED,OEIC and other applications. Silicon substrate attracts attention for its excellent performance. While for the lattice mismatch and thermal mismatch between Si and epitaxial layer,buffer layer is needed on the silicon substrate,which is benefit for epitaxial layer growth.The damaged layer on the silicon substrate has great impact on the nucleation of buffer layer,which further influences the heteroepitaxial growth of epitaxial layer. In order to manufacture high quality silicon wafers used in heteroepitaxy,in this paper,the edge quality of single crystal silicon wafer was studied.

关 键 词：硅单晶 边缘质量 异质外延 倒角 半导体 

分 类 号：TN305.2[电子电信—物理电子学]