高k介质阶梯变宽度SOI LDMOS  

Novel SOI LDMOS with Step Width Drift Region Using High-k Dielectric

作　　者：姚佳飞 郭宇锋[1,2] 李曼 王子轩[1,2] 胡善文 夏天[3] YAO Jia-fei;GUO Yu-feng;LI Man;WANG Zi-xuan;HU Shan-wen;XIA Tian(Nanjing University of Posts and Telecommunications,Nanjing,Jiangsu 210003,China;National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technoglogy,Nanjing,Jiangsu 210003;University of Vermont,Burlington,Vermont 05405,USA)

机构地区：[1]南京邮电大学,江苏南京210003 [2]射频集成与微组装技术国家地方联合工程实验室,江苏南京210003 [3]佛蒙特大学,美国佛蒙特州05405

出　　处：《电子学报》2018年第7期1781-1786,共6页Acta Electronica Sinica

基　　金：国家自然科学基金(No.61704084;No.61574081);江苏省高校自然科学面上项目(No.17KJB510042);射频集成与微组装技术国家地方联合工程实验室开放课题(No.KFJJ20170302)

摘　　要：本文提出了一种具有高k介质阶梯变宽度结构的新型的SOI LDMOS器件,该器件通过在漂移区内引入介质区域使得漂移区的宽度呈阶梯变化.借助三维器件仿真软件DAVINCI对其势场分布及耐压特性进行了深入分析.首先,阶梯变宽度结构能够在漂移区内引入新的电场峰值来优化势场分布,提高击穿电压.其次,采用高k材料作为侧壁介质区域可以进一步优化漂移区内势场分布,并提高漂移区浓度来降低导通电阻.结果表明,与常规结构相比,新器件的击穿电压可提高42%,导通电阻可降低37.5%,其FOM优值是常规器件的3.2倍.In this paper,a novel SOI LDMOS with step width drift region using high-k dielectric is proposed and investigated by a 3 D simulator named DAVINCI. The drift region of newdevice is divided into several regions with different width using the high-k dielectric. First,newadditional electric field peaks are formed at the steps,which enhances the breakdown voltage. Second,the high-k dielectric modulates the potential and electric field distributions to further improve the breakdown voltage,and allows keeping a higher drift doping concentration to reduce the specific on-resistance. Compared with the conventional device,a 42% increase in the breakdown voltage and a 37. 5% decrease in the specific on-resistance are obtained in the newSOI LDMOS. The FOMof newdevice is 3. 2 times of the conventional device.

关 键 词：阶梯变宽度 高k介质 击穿电压 导通电阻 绝缘体上硅 

分 类 号：TN31[电子电信—物理电子学]